Alternatives and similar repositories for ipbus-firmware

Users that are interested in ipbus-firmware are comparing it to the libraries listed below

• ipbus / ipbus-software
  Software that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol
  ☆24Updated 2 weeks ago
• ipbus / ipbb
  IPbus Builder Tool
  ☆14Updated last month
• paulscherrerinstitute / psi_fix
  Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)
  ☆26Updated last year
• slaclab / ruckus
  FPGA and Digital ASIC Build System
  ☆80Updated last month
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆39Updated 10 months ago
• hgomersall / Ovenbird
  A tool for merging the MyHDL workflow with Vivado
  ☆20Updated 5 years ago
• hdl-registers / hdl-registers
  An open-source HDL register code generator fast enough to run in real time.
  ☆79Updated 2 weeks ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆61Updated 2 years ago
• Architech-Silica / Designing-a-Custom-AXI-Slave-Peripheral
  A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
  ☆41Updated 7 years ago
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆100Updated last week
• FPHDL / fphdl
  VHDL-2008 Support Library
  ☆57Updated 9 years ago
• Toroid-io / vcd2wavedrom
  Python script to transform a VCD file to wavedrom format
  ☆82Updated 3 years ago
• quartiq / redpid
  migen + misoc + redpitaya = digital servo
  ☆41Updated 6 years ago
• ZipCPU / dpll
  A collection of phase locked loop (PLL) related projects
  ☆115Updated last year
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆35Updated 4 years ago
• themperek / cocotb-vivado
  Limited python / cocotb interface to Xilinx/AMD Vivado simulator.
  ☆70Updated 3 months ago
• antmicro / cocotb-verilator-build
  ☆26Updated 2 years ago
• ZipCPU / dspfilters
  A collection of demonstration digital filters
  ☆162Updated last year
• ghdl / ghdl-cosim
  Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL
  ☆51Updated this week
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆23Updated 2 years ago
• airhdl / spi-to-axi-bridge
  An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
  ☆53Updated 2 years ago
• paulscherrerinstitute / psi_fpga_all
  Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.
  ☆42Updated 3 months ago
• gsmecher / pyxsi
  Python/C/RTL cosimulation with Xilinx's xsim simulator
  ☆76Updated 5 months ago
• suoto / fpga_cores
  ☆33Updated 2 years ago
• frobino / axi_custom_ip_tb
  A testbench for an axi lite custom IP
  ☆23Updated 11 years ago
• schang412 / cocotbext-spi
  ☆27Updated 2 weeks ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆50Updated 2 months ago
• esynr3z / corsair
  Control and Status Register map generator for HDL projects
  ☆128Updated 7 months ago
• Xilinx / SDFEC-PYNQ
  A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC
  ☆13Updated 3 years ago