Firmware that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol
☆43Feb 22, 2026Updated last week
Alternatives and similar repositories for ipbus-firmware
Users that are interested in ipbus-firmware are comparing it to the libraries listed below
Sorting:
- Software that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol☆24Jan 7, 2026Updated last month
- IPbus Builder Tool☆14Feb 22, 2026Updated last week
- GSI Timing Gateware and Tools☆14Updated this week
- A data acquisition framework in Python and Verilog.☆43Updated this week
- Utilities for Avalon Memory Map☆11Jul 11, 2024Updated last year
- VHDL functional blocks with their simulations and test sequences☆20Updated this week
- Open source firmware for MMC controllers☆44May 28, 2025Updated 9 months ago
- Binderize version of LIGO GW150914 tutorial☆11Oct 3, 2017Updated 8 years ago
- Implementation of FM (frequency modulation) radio transmitter in FPGA Altera Cyclone III.☆14May 16, 2016Updated 9 years ago
- RestFrames: particle physics event analysis library☆10Dec 17, 2020Updated 5 years ago
- an sata controller using smallest resource.☆17Feb 5, 2014Updated 12 years ago
- SDR-Transceiver☆10Dec 30, 2019Updated 6 years ago
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Jan 7, 2016Updated 10 years ago
- FPGA and Digital ASIC Build System☆81Updated this week
- Wireshark dissector plugin for EPICS protocols☆26Aug 23, 2025Updated 6 months ago
- FPGA-based I2C to RS-232 serial converter / bus monitor☆13Jan 29, 2016Updated 10 years ago
- Tutorial on how to use the AXI ACP on the UltraZed-EG IOCC☆11Jun 13, 2018Updated 7 years ago
- LMAC Core1 - Ethernet 1G/100M/10M☆19Apr 3, 2023Updated 2 years ago
- Open source/hardware SoC plattform based on the lattice mico 32 softcore☆15Apr 10, 2010Updated 15 years ago
- Generates simple AXI4-lite IP for use in Vivado from register specifications☆15Apr 11, 2025Updated 10 months ago
- Python tools to interact with boundary scan-capable devices. Useful for reverse engineering, testing, etc.☆17May 3, 2016Updated 9 years ago
- ☆12Mar 1, 2021Updated 5 years ago
- MLAB hardware modules and building blocks☆16Sep 30, 2023Updated 2 years ago
- 利用ZYNQ7020实现SAR数据 采集系统，其中包含硬件设计代码、上位机、测试程序。☆14Feb 27, 2025Updated last year
- C++ library for AXI DMA with direct and scatter-gather support☆13Feb 22, 2022Updated 4 years ago
- ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)☆13Aug 29, 2018Updated 7 years ago
- A collection of Opal Kelly provided design resources☆17Nov 7, 2025Updated 3 months ago
- An embeddable FPGA SoM designed for high-speed audio and USB applications.☆26Mar 15, 2025Updated 11 months ago
- ESnet general-purpose FPGA design library.☆14Feb 18, 2026Updated last week
- [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency☆32Feb 17, 2021Updated 5 years ago
- ☆18Oct 5, 2020Updated 5 years ago
- OscillatorIMP ecosystem FPGA IP sources☆27Feb 22, 2026Updated last week
- A collection of debugging busses developed and presented at zipcpu.com☆42Jan 18, 2024Updated 2 years ago
- ☆35Sep 12, 2019Updated 6 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆40Feb 24, 2025Updated last year
- ☆47Feb 18, 2026Updated last week
- Tutorials for CMS analysis in scientific Python☆12May 29, 2020Updated 5 years ago
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Apr 22, 2024Updated last year
- A C++ template library for FPGAs on top of Xilinx Vivado HLS☆14Feb 2, 2017Updated 9 years ago