Repository used to support automated builds under PetaLinux tools that use Yocto.
☆63Mar 27, 2025Updated 11 months ago
Alternatives and similar repositories for petalinux
Users that are interested in petalinux are comparing it to the libraries listed below
Sorting:
- Avnet Board Definition Files☆141Jan 12, 2026Updated last month
- Used for overriding files generated by PetaLinux with Avnet board specific configurations.☆12Mar 24, 2025Updated 11 months ago
- meta-petalinux distro layer supporting Xilinx Tools☆100Nov 20, 2025Updated 3 months ago
- File editor for the Xilinx AXI Traffic Generator IP☆17Feb 9, 2026Updated 3 weeks ago
- ☆115Mar 24, 2025Updated 11 months ago
- ☆14Mar 1, 2023Updated 3 years ago
- Board files to build Ultra 96 PYNQ image☆157Sep 14, 2025Updated 5 months ago
- Making Lattice SensAI work properly on tinyVision products☆12Nov 22, 2022Updated 3 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Jul 10, 2019Updated 6 years ago
- Firmware binaries for Microchip ATWILC Wireless Devices (ATWILC1000 & ATWILC3000)☆16Feb 23, 2026Updated last week
- A C++ template library for FPGAs on top of Xilinx Vivado HLS☆14Feb 2, 2017Updated 9 years ago
- A Tcl-based CAD Tool Framework for Xilinx's Vivado Design Suite☆44Oct 21, 2019Updated 6 years ago
- ☆72Feb 16, 2023Updated 3 years ago
- Updated version of the XUP Workshops☆18Aug 10, 2018Updated 7 years ago
- Hybrid BFS on Xilinx Zynq☆18Jun 9, 2015Updated 10 years ago
- [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency☆32Feb 17, 2021Updated 5 years ago
- Simple AMP Running Linux and Bare-Metal System on Both Zynq SoC Processors☆22Dec 17, 2015Updated 10 years ago
- This project is trying to create a base vitis platform to run with DPU☆49Jul 8, 2020Updated 5 years ago
- ☆22Mar 13, 2019Updated 6 years ago
- Dockerfile to build docker images with Petalinux (Tested on version 2018.3~2021.1)☆122Apr 29, 2022Updated 3 years ago
- Yocto metalayer for TQ System SOM hardware support☆12Feb 3, 2026Updated last month
- Yocto Project layer enables AMD Xilinx tools related metadata for MicroBlaze, Zynq, ZynqMP and Versal devices.☆66Nov 20, 2025Updated 3 months ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆10Jun 1, 2021Updated 4 years ago
- Implementation of FM (frequency modulation) radio transmitter in FPGA Altera Cyclone III.☆14May 16, 2016Updated 9 years ago
- Jumpstart your custom DNN accelerator today. This project holds scripts to build and start containers that can compile binaries to the ze…☆10Jun 17, 2020Updated 5 years ago
- Quadcopter control and pole balancing using deep reinforcement learning and hand gestures on ultra96☆10Oct 31, 2023Updated 2 years ago
- an sata controller using smallest resource.☆17Feb 5, 2014Updated 12 years ago
- ☆10Jan 15, 2023Updated 3 years ago
- MessagePack implementation for VHDL☆11Nov 29, 2017Updated 8 years ago
- Sample scripts for FPGA-based AI Edge Contest 2019☆12Mar 20, 2020Updated 5 years ago
- A configuration controller solution allowing a Zynq device to configure downstream FPGAs☆14Oct 5, 2015Updated 10 years ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆335Jan 20, 2025Updated last year
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Jan 7, 2016Updated 10 years ago
- Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs☆49Aug 31, 2017Updated 8 years ago
- meta-layer for EBAZ4205☆16Jun 7, 2021Updated 4 years ago
- SHA-1,SHA-256,SHA-512 Secure Hash Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).☆12Oct 14, 2017Updated 8 years ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Jan 22, 2025Updated last year
- ☆14Apr 17, 2022Updated 3 years ago
- Zynq PR Management☆13Apr 20, 2016Updated 9 years ago