weiya711 / sam
☆18Updated last week
Alternatives and similar repositories for sam:
Users that are interested in sam are comparing it to the libraries listed below
- Code base for OOPSLA'24 paper: UniSparse: An Intermediate Language for General Sparse Format Customization☆30Updated 5 months ago
- EQueue Dialect☆40Updated 3 years ago
- agile hardware-software co-design☆46Updated 3 years ago
- A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.☆18Updated 2 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- ☆25Updated 3 years ago
- A graph linear algebra overlay☆51Updated last year
- Stencil with Optimized Dataflow Architecture Compiler☆16Updated 4 years ago
- STONNE Simulator integrated into SST Simulator☆19Updated last year
- ☆18Updated 2 months ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆23Updated 4 months ago
- Domain-Specific Architecture Generator 2☆20Updated 2 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆58Updated 6 months ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆36Updated 2 years ago
- ☆33Updated 3 years ago
- TileFlow is a performance analysis tool based on Timeloop for fusion dataflows☆57Updated last year
- ☆48Updated 3 weeks ago
- Sparse kernels for GNNs based on TVM☆16Updated 4 years ago
- ☆25Updated last year
- A unified programming framework for high and portable performance across FPGAs and GPUs☆11Updated 3 weeks ago
- MAGIS: Memory Optimization via Coordinated Graph Transformation and Scheduling for DNN (ASPLOS'24)☆49Updated 10 months ago
- Polyhedral High-Level Synthesis in MLIR☆30Updated 2 years ago
- HeteroCL-MLIR dialect for accelerator design☆40Updated 6 months ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆90Updated 6 months ago
- Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)☆31Updated 11 months ago
- ☆41Updated this week
- DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators☆13Updated 6 months ago
- A Generic Distributed Auto-Tuning Infrastructure☆22Updated 3 years ago
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆53Updated 5 years ago
- Serpens is an HBM FPGA accelerator for SpMV☆18Updated 8 months ago