We solve the two challenges architects face when designing heterogeneous processors with cache coherent shared memory. First, we develop an automated tool, called HeteroGen, for composing clusters of cores, each with its own coherence protocol. Second, we show that the output of HeteroGen adheres to a precisely defined memory consistency model t…
☆22Jan 7, 2022Updated 4 years ago
Alternatives and similar repositories for HeteroGen
Users that are interested in HeteroGen are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Designing directory cache coherence protocols is complicated because coherence transactions are not atomic in modern multicore processors…☆16Jan 7, 2022Updated 4 years ago
- This GitHub repo contains the artifact for CPElide, which appears at MICRO '24☆17Sep 7, 2024Updated last year
- RPCNIC: A High-Performance and Reconfigurable PCIe-attached RPC Accelerator [HPCA2025]☆16Dec 9, 2024Updated last year
- Sampled simulation of multi-threaded applications using LoopPoint methodology☆25Feb 21, 2026Updated 6 months ago
- The official repository for the gem5 computer-system architecture simulator.☆15Updated this week
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Binary Single Precision Floating-point Fused Multiply-Add Unit Design (Verilog HDL)☆22Jul 8, 2013Updated 13 years ago
- gups mirror☆12Oct 25, 2015Updated 10 years ago
- ANSI-C benchmarks generated from Verilog RTL circuits with safety assertions. Used for Formal Property Verification.☆17Dec 1, 2018Updated 7 years ago
- CMurphi mirror: http://mclab.di.uniroma1.it/site/index.php/software/18-cmurphi☆15Jan 22, 2016Updated 10 years ago
- ☆13Mar 3, 2022Updated 4 years ago
- ☆19Oct 17, 2025Updated 10 months ago
- MESIF cache coherency protocol for the GEM5 simulator☆15Jun 2, 2016Updated 10 years ago
- Memory consistency model checking and test generation library.☆15Oct 14, 2016Updated 9 years ago
- Code for reproducing work of ICML 2019 paper: Memory-Optimal Direct Convolutions for Maximizing Classification Accuracy in Embedded Appli…☆12Jun 8, 2019Updated 7 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- GenStore is the first in-storage processing system designed for genome sequence analysis that greatly reduces both data movement and comp…☆15Apr 6, 2022Updated 4 years ago
- 基于 Whisper 语音识别 + AI分析的短视频提取工具。自动将长视频转语音、识别爆点片段、裁剪 生成精彩集锦。适合内容创作者快速从长视频中提取高能时刻☆20Mar 5, 2026Updated 5 months ago
- Artifact for "DX100: A Programmable Data Access Accelerator for Indirection (ISCA 2025)" paper☆20Nov 6, 2025Updated 9 months ago
- ☆16Mar 26, 2025Updated last year
- Benchmarking code for evaluating the cost of cache coherence protocols implemented on different platforms☆14Apr 13, 2021Updated 5 years ago
- ☆21Oct 27, 2022Updated 3 years ago
- MICRO 2023 Evaluation Artifact for TeAAL☆12Oct 26, 2023Updated 2 years ago
- Manycore platform Simulation tool for NoC-based platform at a Cycle-accurate level☆13Feb 22, 2018Updated 8 years ago
- The Juice package for circuits in artificial intelligence, both logic and probabilistic☆12Mar 8, 2022Updated 4 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Extending BookSim2.0 and HotSpot6.0 for Power, Performance and Thermal evaluation of 3D NoC Architectures☆14Aug 9, 2019Updated 7 years ago
- arkit demo☆11Aug 20, 2018Updated 8 years ago
- This repository contains a SystemVerilog implementation of a parametrized Round Robin arbiter with three instantiation options☆13Jan 28, 2024Updated 2 years ago
- CoreOS, Nvidia kernel module Dockerfile☆15Aug 20, 2015Updated 11 years ago
- Pragmatic models for generating and following instructions☆13Dec 22, 2019Updated 6 years ago
- ☆25Aug 1, 2022Updated 4 years ago
- A tool for cross-checking Verilog compilers☆15Apr 16, 2025Updated last year
- [HPCA 2022] GCoD: Graph Convolutional Network Acceleration via Dedicated Algorithm and Accelerator Co-Design☆39Mar 30, 2022Updated 4 years ago
- Experimental port of ADEV to Julia☆11Nov 12, 2023Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆65Dec 4, 2022Updated 3 years ago
- ☆14Mar 4, 2015Updated 11 years ago
- Computational Storage Device based on the open source project OpenSSD.☆31Oct 25, 2020Updated 5 years ago
- ☆13Apr 17, 2025Updated last year
- Prompt format and padding guide for Llama 2☆12Sep 18, 2023Updated 2 years ago
- Source code for XPGraph-MICRO22☆11Apr 10, 2023Updated 3 years ago
- Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification☆20Jul 8, 2026Updated last month