Verilog 2001 implementation of the ChaCha stream cipher.
☆44Jan 17, 2026Updated 3 months ago
Alternatives and similar repositories for chacha
Users that are interested in chacha are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Modular Exponentiation core written i Verilog. Supports key lengths between 32 and 8192 bits.☆17Oct 8, 2020Updated 5 years ago
- XR21B1411 (B1411) driver for Orange Pi Zero with forced RS-485 mode☆13Jun 18, 2018Updated 7 years ago
- git clone of http://code.google.com/p/axi-bfm/☆18May 21, 2013Updated 12 years ago
- Tools for testing kernel ciphers and hash algorithm☆15Apr 27, 2023Updated 3 years ago
- ☆27Mar 25, 2019Updated 7 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementatio…☆432Dec 29, 2025Updated 4 months ago
- Hardware implementation of the blake2 hash function☆26Oct 8, 2020Updated 5 years ago
- Matrix multiplication on multiple Nios II cores☆16Feb 12, 2020Updated 6 years ago
- Rust + Tor (embedded) + Static (compile) + Windows + Proof of Concept☆13Feb 4, 2018Updated 8 years ago
- Erlang Network Monitor☆11Apr 22, 2016Updated 10 years ago
- Raft as a library. Includes optional capabilities from the Raft whitepaper, such as snapshotting.☆24Jul 16, 2025Updated 9 months ago
- Optimized block functions for the ChaCha stream cipher☆52Jan 22, 2020Updated 6 years ago
- Paul Layzell's Evolvable Motherboard☆13Sep 14, 2015Updated 10 years ago
- Wishbone <-> AXI converters☆13Jun 1, 2015Updated 10 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- A extremely size-optimized RV32I soft processor for FPGA.☆27Jun 19, 2018Updated 7 years ago
- This repository contains synthesizable examples which use the PoC-Library.☆39Dec 24, 2020Updated 5 years ago
- Layouts designed in the Angular Material. The Angular Material project is an implementation of Material Design in Angular.js.☆12Jan 18, 2016Updated 10 years ago
- This project allows you to have a set of aliases defined per directory and subdirectories☆11Aug 15, 2021Updated 4 years ago
- The BIRD routing daemon integration with UCI and LuCI☆11Jul 29, 2017Updated 8 years ago
- Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)☆43Dec 1, 2019Updated 6 years ago
- Programs a Spartan 6 FPGA over JTAG using an FTDI USB chip.☆16Jul 27, 2019Updated 6 years ago
- Converts cargo check (and clippy) JSON output to the GitHub Action error format☆15Jun 17, 2024Updated last year
- RISV-V FM Synthesizer☆11Dec 17, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Xilinx Virtual Cable Daemon☆20Nov 20, 2019Updated 6 years ago
- ☆13Jul 2, 2025Updated 10 months ago
- mDNS resolving crate for Rust☆14Jan 12, 2024Updated 2 years ago
- GFWX: Good, Fast Wavelet Codec (Rust)☆14Oct 29, 2025Updated 6 months ago
- TMDS encoding tools☆17Jan 11, 2018Updated 8 years ago
- Pure Rust implementations of static Diffie-Hellman (and static elliptic-curve DH) key-exchange☆13Jan 12, 2021Updated 5 years ago
- Vello graphics in Bevy.☆13Feb 7, 2025Updated last year
- Interactive proof-of-concept of the Dual_EC_DRBG backdoor☆20Sep 8, 2022Updated 3 years ago
- A device tree visualizer (early development)☆17Mar 29, 2026Updated last month
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆11Nov 13, 2023Updated 2 years ago
- AXFR2Route53.py is a local script that transfers DNS records from an upstream DNS server via AXFR as defined in RFC 5936 and submits entr…☆13Mar 2, 2018Updated 8 years ago
- iDEA FPGA Soft Processor☆17Jun 9, 2016Updated 9 years ago
- Beer fermentation control on a Raspberry Pi and web graphing UI (superseded by https://github.com/mkj/fridgyeast)☆11Feb 27, 2021Updated 5 years ago
- Vivado design for basic NeTV2 FPGA with chroma-based overlay☆20Dec 24, 2016Updated 9 years ago
- Java Library to include text messages into stack traces☆11Oct 25, 2019Updated 6 years ago
- 8 fast digital MEMS microphones input to a Beaglebone☆13Oct 12, 2021Updated 4 years ago