secworks / asconLinks
Verilog implementation of the ASCON lightweight  authenticated encryption and hashing algorithm
☆10Updated 11 months ago
Alternatives and similar repositories for ascon
Users that are interested in ascon are comparing it to the libraries listed below
Sorting:
- Implemented The UART with FIFO☆14Updated 6 years ago
 - A final semester based group project for EE4218: Embedded Hardware System Design module in NUS where I worked with my teammate to perform…☆16Updated 2 years ago
 - Senior Design Project at UW-Madison ECE☆16Updated 2 years ago
 - Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs☆12Updated 5 years ago
 - A true random number generator with ring oscillators structure written in VHDL targeting FPGA's.☆11Updated 5 years ago
 - A demo system for Ibex including debug support and some peripherals☆78Updated 4 months ago
 - ☆21Updated last year
 - Verilog UART☆184Updated 12 years ago
 - Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL☆120Updated 3 years ago
 - IEEE 754 single and double precision floating point library in systemverilog and vhdl☆72Updated 10 months ago
 - SDRAM controller with AXI4 interface☆98Updated 6 years ago
 - Generate testbench for your verilog module.☆38Updated 7 years ago
 - An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆77Updated last year
 - In this repository, the RTL design and verification of the axi2apb bridge communication protocol are realized. In this system, the prefer…☆18Updated 3 years ago
 - Xilinx AXI VIP example of use☆42Updated 4 years ago
 - Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)☆41Updated 5 years ago
 - I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆48Updated last year
 - This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clo…☆56Updated 2 years ago
 - ☆53Updated 6 years ago
 - FPGA implementation of Chinese SM4 encryption algorithm.☆56Updated 7 years ago
 - a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆66Updated last year
 - An end-to-end chip authentication architecture based on SRAM PUF and public key cryptography.☆17Updated 5 years ago
 - Accelerating the AES algorithm on an FPGA and comparing the speedup with both AES and Modified AES algorithms☆31Updated 3 years ago
 - Verilog based BCH encoder/decoder☆125Updated 3 years ago
 - A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆69Updated last year
 - AES加密解密算法的Verilog实现☆67Updated 9 years ago
 - 32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.☆92Updated 6 years ago
 - AXI4 and AXI4-Lite interface definitions☆96Updated 5 years ago
 - ☆19Updated 6 months ago
 - A simple Verilog SPI master / slave implementation featuring all 4 modes.☆68Updated 4 years ago