Alternatives and similar repositories for ascon-verilog

Users that are interested in ascon-verilog are comparing it to the libraries listed below

• ascon / ascon-hardware
  NIST LWC Hardware Reference Implementation of Ascon v1.2
  ☆31Updated 2 years ago
• lowRISC / ot-sca
  Side-channel analysis setup for OpenTitan
  ☆37Updated 2 months ago
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆37Updated 4 years ago
• mupq / pqriscv-vexriscv
  VexRiscv reference platforms for the pqriscv project
  ☆16Updated last year
• proteus-core / proteus
  The SpinalHDL design of the Proteus core, an extensible RISC-V core.
  ☆59Updated last week
• coruus / canright-aes-sboxes
  David Canright's tiny AES S-boxes
  ☆28Updated 11 years ago
• isec-tugraz / coco-alma
  CocoAlma is an execution-aware tool for formal verification of masked implementations
  ☆23Updated last year
• Chair-for-Security-Engineering / AES_masked_BRAM
  Designs of first-order SCA-secure hardware implementations of AES encryption/decryptoin dedicated to Xilinx FPGAs (using BRAM)
  ☆16Updated 5 years ago
• hadipourh / CryptoHDL
  A list of VHDL codes implementing cryptographic algorithms
  ☆27Updated 4 years ago
• chipsalliance / adams-bridge
  Post-Quantum Cryptography IP Core (Crystals-Dilithium)
  ☆42Updated last month
• chipsalliance / caliptra-rtl
  HW Design Collateral for Caliptra RoT IP
  ☆124Updated last week
• BLu85 / AES-GCM-128-192-256-bits
  Configurable AES-GCM IP (128, 192, 256 bits)
  ☆38Updated 4 months ago
• ascon / ascon-hardware-sca
  NIST LWC Hardware Design of Ascon with Protection against Power Side-Channel Attacks
  ☆19Updated 2 years ago
• Chair-for-Security-Engineering / SILVER
  SILVER - Statistical Independence and Leakage Verification
  ☆14Updated 7 months ago
• scarv / scarv
  SCARV: a side-channel hardened RISC-V platform
  ☆22Updated 4 years ago
• ChairImpSec / PROLEAD
  PROLEAD - A Probing-Based Leakage Detection Tool for Hardware and Software　　　　　　　　　　　　　FIESTA - Fault Injection Evaluation with Statistic…
  ☆41Updated last week
• GMUCERG / LWC
  Development Package for the Hardware API for Lightweight Cryptography
  ☆17Updated 9 months ago
• newaetech / CW305-Arm-DesignStart
  Instruction and files for porting Arm DesignStart to CW305.
  ☆16Updated 2 years ago
• antmicro / rowhammer-tester
  ☆72Updated last month
• scluconn / DA_PUF_Library
  Defense/Attack PUF Library (DA PUF Library)
  ☆54Updated 5 years ago
• simple-crypto / SCALib
  Side-Channel Analysis Library
  ☆105Updated 4 months ago
• acmert / kyber-polmul-hw
  Hardware implementation of polynomial multiplication operation of CRYSTALS-KYBER PQC scheme
  ☆40Updated 3 years ago
• ZSusskind / vcd2csv
  Extracts specified data from a VCD file into CSV form
  ☆10Updated 6 years ago
• vmarribas / VerMFi
  VerMFi: Verification tool for Masked implementations and Fault injection. Set of tools to evaluate resistance of secure hardware against …
  ☆20Updated 6 years ago
• secworks / modexp
  Modular Exponentiation core written i Verilog. Supports key lengths between 32 and 8192 bits.
  ☆17Updated 5 years ago
• secworks / sha3
  FIPS 202 compliant SHA-3 core in Verilog
  ☆23Updated 5 years ago
• ANSSI-FR / IPECC
  A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration
  ☆46Updated last month
• opentrng / ptrng
  Open-source implementations of reference Physical True Random Number Generators (TRNG or PTRNG) based on ring oscillators.
  ☆13Updated 3 months ago
• YosysHQ / nerv
  Naive Educational RISC V processor
  ☆94Updated 3 months ago
• eriksargent / PUF-lab
  FPGA implementation of a physical unclonable function for authentication
  ☆33Updated 8 years ago