rsnikhil / ICFP2020_Bluespec_TutorialLinks
Tutorial on hardware design using Bluespec BH (Bluespec Classic) for Haskell programmers at ACM ICFP 2020 conference
☆73Updated 2 years ago
Alternatives and similar repositories for ICFP2020_Bluespec_Tutorial
Users that are interested in ICFP2020_Bluespec_Tutorial are comparing it to the libraries listed below
Sorting:
- Main page☆126Updated 5 years ago
- A core language for rule-based hardware design 🦑☆156Updated 2 weeks ago
- Haskell library for hardware description☆104Updated 2 weeks ago
- Formal specification of RISC-V Instruction Set☆100Updated 4 years ago
- A Platform for High-Level Parametric Hardware Specification and its Modular Verification☆155Updated this week
- A formal semantics of the RISC-V ISA in Haskell☆167Updated last year
- A RiscV processor implementing the RV32I instruction set written in Clash☆53Updated 7 years ago
- Bluespec BSV HLHDL tutorial☆105Updated 9 years ago
- A collection of reusable Clash designs/examples☆51Updated last year
- Textbook and full source codes to learn basics of RISC-V pipelined CPU design using the Bluespec Hardware Design Language(s)☆77Updated 9 months ago
- Time-sensitive affine types for predictable hardware generation☆143Updated 11 months ago
- A generic test bench written in Bluespec☆53Updated 4 years ago
- RISC-V Formal Verification Framework☆141Updated last week
- A hardware compiler based on LLHD and CIRCT☆260Updated last year
- Chisel/Firrtl execution engine☆153Updated 10 months ago
- The source code to the Voss II Hardware Verification Suite☆56Updated 2 months ago
- Galois RISC-V ISA Formal Tools☆58Updated 2 months ago
- (System)Verilog to Chisel translator☆115Updated 3 years ago
- ☆40Updated 3 years ago
- Manythread RISC-V overlay for FPGA clusters☆38Updated 2 years ago
- A scala based simulator for circuits described by a LoFirrtl file☆48Updated 2 years ago
- A dynamic verification library for Chisel.☆151Updated 7 months ago
- Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project☆142Updated 3 weeks ago
- An introductory guide to Bluespec (BSV)☆62Updated 6 years ago
- A eDSL framework based on Scala and MLIR, focusing on the Hardware design.☆38Updated last week
- WAL enables programmable waveform analysis.☆154Updated 2 weeks ago
- ☆103Updated 2 years ago
- The specification for the FIRRTL language☆58Updated last week
- Lectures for the Agile Hardware Design course in Jupyter Notebooks☆95Updated last month
- RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT☆175Updated last month