adamwalker / clash-utilsLinks
A collection of reusable Clash designs/examples
☆51Updated last year
Alternatives and similar repositories for clash-utils
Users that are interested in clash-utils are comparing it to the libraries listed below
Sorting:
- A RiscV processor implementing the RV32I instruction set written in Clash☆53Updated 7 years ago
- Haskell library for hardware description☆104Updated 2 weeks ago
- Tutorial on hardware design using Bluespec BH (Bluespec Classic) for Haskell programmers at ACM ICFP 2020 conference☆73Updated 2 years ago
- Generate interface between Clash and Verilator☆22Updated last year
- Projects to get started with Clash☆28Updated 5 months ago
- Formal specification of RISC-V Instruction Set☆100Updated 4 years ago
- A formal semantics of the RISC-V ISA in Haskell☆167Updated last year
- ☆29Updated 4 years ago
- Galois RISC-V ISA Formal Tools☆58Updated 2 months ago
- ☆20Updated this week
- Library code for upcoming RetroClash book☆9Updated 4 months ago
- On going experiments with Clash☆22Updated 9 years ago
- Intel 8080 CPU core: software emulator and CLaSH hardware description☆27Updated 2 years ago
- A Platform for High-Level Parametric Hardware Specification and its Modular Verification☆155Updated this week
- A Clash playground/starter kit, using Nix☆36Updated 6 years ago
- Arty FPGA board starter project☆11Updated 2 years ago
- ☆17Updated last year
- Manythread RISC-V overlay for FPGA clusters☆38Updated 2 years ago
- Where Lions Roam: Haskell & Hardware on VELDT☆22Updated last year
- A core language for rule-based hardware design 🦑☆156Updated 2 weeks ago
- A Verilog parser for Haskell.☆34Updated 3 years ago
- Main page☆126Updated 5 years ago
- Formal specification and verification of hardware, especially for security and privacy.☆126Updated 3 years ago
- A special-purpose processor for pure, non-strict functional languages☆28Updated 5 months ago
- ☆21Updated 9 years ago
- a battery-included library for dataflow protocols☆21Updated this week
- Time-sensitive affine types for predictable hardware generation☆143Updated 11 months ago
- Kansas Lava☆48Updated 5 years ago
- Verilog development and verification project for HOL4☆26Updated 2 months ago
- Reticle evaluation (PLDI 2021)☆12Updated 4 years ago