adamwalker / clash-utils
A collection of reusable Clash designs/examples
☆49Updated last year
Alternatives and similar repositories for clash-utils:
Users that are interested in clash-utils are comparing it to the libraries listed below
- Haskell library for hardware description☆101Updated 2 months ago
- A RiscV processor implementing the RV32I instruction set written in Clash☆53Updated 6 years ago
- Tutorial on hardware design using Bluespec BH (Bluespec Classic) for Haskell programmers at ACM ICFP 2020 conference☆69Updated 2 years ago
- Generate interface between Clash and Verilator☆22Updated 10 months ago
- ☆27Updated 3 years ago
- Formal specification of RISC-V Instruction Set☆98Updated 4 years ago
- A Clash playground/starter kit, using Nix☆35Updated 6 years ago
- Projects to get started with Clash☆27Updated last month
- ☆19Updated this week
- Kami - a DSL for designing Hardware in Coq, and the associated semantics and theorems for proving its correctness. Kami is inspired by Bl…☆199Updated 4 years ago
- The RiscvSpecKami package provides SiFive's RISC-V processor model. Built using Coq, this processor model can be used for simulation, mod…☆76Updated 4 years ago
- ☆21Updated 9 years ago
- A formal semantics of the RISC-V ISA in Haskell☆161Updated last year
- On going experiments with Clash☆22Updated 9 years ago
- A Platform for High-Level Parametric Hardware Specification and its Modular Verification☆146Updated 4 months ago
- a battery-included library for dataflow protocols☆20Updated 2 weeks ago
- Galois RISC-V ISA Formal Tools☆56Updated last year
- Intel 8080 CPU core: software emulator and CLaSH hardware description☆25Updated 2 years ago
- A special-purpose processor for pure, non-strict functional languages☆27Updated last month
- Formal specification and verification of hardware, especially for security and privacy.☆124Updated 2 years ago
- A core language for rule-based hardware design 🦑☆147Updated 4 months ago
- Library code for upcoming RetroClash book☆9Updated 10 months ago
- Verilog development and verification project for HOL4☆25Updated 3 months ago
- Kansas Lava☆46Updated 5 years ago
- The goal of the Feldspar project is to define a high-level language that allows description of high-performance digital signal processing…☆45Updated 3 years ago
- Where Lions Roam: Haskell & Hardware on VELDT☆21Updated 8 months ago
- CLaSH prelude library containing datatypes and functions for circuit design☆31Updated 6 years ago
- Main page☆125Updated 5 years ago
- ☆15Updated last year
- Manythread RISC-V overlay for FPGA clusters☆35Updated 2 years ago