rohittp0 / chiponLinks
PyTorch to Verilog transpiler
☆15Updated last year
Alternatives and similar repositories for chipon
Users that are interested in chipon are comparing it to the libraries listed below
Sorting:
- PyTorch model to RTL flow for low latency inference☆126Updated last year
- Microarchitecture diagrams of several CPUs☆36Updated last month
- Machine-Learning Accelerator System Exploration Tools☆166Updated this week
- Allo: A Programming Model for Composable Accelerator Design☆235Updated last week
- A matrix extension proposal for AI applications under RISC-V architecture☆148Updated 3 months ago
- LLVM OpenCL C compiler suite for ventus GPGPU☆47Updated last week
- A high-efficiency system-on-chip for floating-point compute workloads.☆35Updated 4 months ago
- RISC-V Packed SIMD Extension☆147Updated last year
- Torch2Chip (MLSys, 2024)☆51Updated 2 months ago
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆48Updated last year
- Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra☆56Updated 3 years ago
- A teaching-focused RISC-V CPU design used at UC Davis☆147Updated 2 years ago
- Chisel RISC-V Vector 1.0 Implementation☆98Updated last month
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆53Updated 2 months ago
- An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…☆85Updated last year
- Unofficial description of the CUDA assembly (SASS) instruction sets.☆94Updated 2 months ago
- RISC-V-based many-core neuromorphic architecture