NamanMakkar / ECE5545-ML-Hardware-SystemsView external linksLinks
This repo contains the Assignments from Cornell Tech's ECE 5545 - Machine Learning Hardware and Systems offered in Spring 2023
☆42May 31, 2023Updated 2 years ago
Alternatives and similar repositories for ECE5545-ML-Hardware-Systems
Users that are interested in ECE5545-ML-Hardware-Systems are comparing it to the libraries listed below
Sorting:
- A 2-Way Super-Scalar OoO RISC-V Core Based on Intel P6 Microarchitecture.☆16Sep 27, 2022Updated 3 years ago
- ☆11Jun 11, 2021Updated 4 years ago
- ☆12Sep 18, 2024Updated last year
- An implementation of RV32I based on EECS151☆10Jan 30, 2024Updated 2 years ago
- ☆26Feb 27, 2025Updated 11 months ago
- 给NEMU移植Linux Kernel!☆22Jun 1, 2025Updated 8 months ago
- QuardStar Tutorial is all you need !☆17Sep 11, 2024Updated last year
- Lab 5 project of MIT-6.5940, deploying LLaMA2-7B-chat on one's laptop with TinyChatEngine.☆18Dec 1, 2023Updated 2 years ago
- A Portable Linux-based Firmware for NVMe Computational Storage Devices☆31Jun 10, 2025Updated 8 months ago
- Simple UVM environment for experimenting with Verilator.☆28Nov 3, 2025Updated 3 months ago
- This is my hobby project with System Verilog to accelerate LeViT Network which contain CNN and Attention layer.☆32Aug 13, 2024Updated last year
- DGEMM on KNL, achieve 75% MKL☆19May 19, 2022Updated 3 years ago
- GPGPU-Sim 中文注释版代码，包含 GPGPU-Sim 模拟器的最新版代码，经过中文注释，以帮助中文用户更好地理解和使用该模拟器。☆28Dec 18, 2024Updated last year
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆56Nov 22, 2023Updated 2 years ago
- ☆63Apr 22, 2025Updated 9 months ago
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆54Jul 23, 2022Updated 3 years ago
- An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences☆31Mar 7, 2024Updated last year
- A LoongArch pipeline CPU. Project of Computer Architecture Lab @UCAS.☆33May 29, 2024Updated last year
- UC Berkeley CS152 Computer Architecture and Engineering Labs☆26Jun 17, 2020Updated 5 years ago
- AdderNet ResNet20 for cifar10 written in SpinalHDL☆35Mar 14, 2021Updated 4 years ago
- DEsign 16-bit ALU using Verilog☆10Feb 13, 2016Updated 10 years ago
- ☆42Mar 31, 2025Updated 10 months ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆163Updated this week
- hadoop 的 docker 集群配置☆11Jun 8, 2024Updated last year
- 网络流量大小预测(基于Abilene数据库)☆13Apr 10, 2020Updated 5 years ago
- ☆10Mar 19, 2025Updated 10 months ago
- ☆10Nov 5, 2019Updated 6 years ago
- Simulator for a superscalar processor with dynamic scheduling and branch prediction☆15Nov 23, 2018Updated 7 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆11May 6, 2019Updated 6 years ago
- 使用unet模型结构在Tusimple数据集上训练得到预测车道线的效果。☆10Dec 27, 2021Updated 4 years ago
- Innervator: Hardware Acceleration for Neural Networks☆18Aug 3, 2024Updated last year
- MD5 in VHDL☆11Jan 4, 2017Updated 9 years ago
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆186Jan 8, 2026Updated last month
- FPGA-based hardware accelerator for Vision Transformer (ViT), with Hybrid-Grained Pipeline.☆125Jan 20, 2025Updated last year
- Training Materials for RISC-V HW/SW, focusing on compilers, emulators, and virtual machines. provided by PLCT Lab.☆37Apr 19, 2024Updated last year
- An FPGA Accelerator for Transformer Inference☆93Apr 29, 2022Updated 3 years ago
- A PyTorch-like deep learning framework. Just for fun.☆156Oct 9, 2023Updated 2 years ago
- FSA: Fusing FlashAttention within a Single Systolic Array☆87Aug 12, 2025Updated 6 months ago
- A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network☆133Jul 22, 2025Updated 6 months ago