jiegec / cpu
Microarchitecture diagrams of several CPUs
☆31Updated 3 weeks ago
Alternatives and similar repositories for cpu:
Users that are interested in cpu are comparing it to the libraries listed below
- CPU micro benchmarks☆55Updated 2 weeks ago
- ☆17Updated 3 years ago
- Lower chisel memories to SRAM macros☆12Updated last year
- A collection of tests and benchmarks for the Arc simulation backend of CIRCT☆28Updated 2 months ago
- ☆40Updated 3 months ago
- Implements kernels with RISC-V Vector☆22Updated 2 years ago
- A hand-written recursive decent Verilog parser.☆11Updated 2 years ago
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆27Updated 3 months ago
- Xiangshan deterministic workloads generator☆17Updated last month
- ☆14Updated 3 weeks ago
- ☆19Updated last year
- Fuzzing General-Purpose Hardware Designs with Software Fuzzers☆16Updated last month
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆61Updated 3 years ago
- Run Rocket Chip on VCU128☆30Updated 4 months ago
- A eDSL framework based on Scala and MLIR, focusing on the Hardware design.☆31Updated this week
- Wrappers for open source FPU hardware implementations.☆31Updated last year
- Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC☆24Updated 3 weeks ago
- ☆11Updated 2 months ago
- ☆33Updated 3 weeks ago
- Virtuoso is a fast, accurate and versatile simulation framework designed for virtual memory research. Virtuoso uses a new simulation met…☆52Updated this week
- BOOM's Simulation Accelerator.☆13Updated 3 years ago
- Parendi: Thousand-way Parallel RTL Simulation on the Graphcore IPU☆19Updated last year
- This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…☆20Updated 2 months ago
- 第一届 RISC-V 中国峰会的幻灯片等资料存放☆37Updated 2 years ago
- A GPU FP32 computation method with Tensor Cores.☆20Updated 2 years ago
- Open-source non-blocking L2 cache☆39Updated this week
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Updated last year
- ☆69Updated 5 months ago
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆38Updated 8 months ago
- Split large FIRRTL into separated modules for incremental compilation.☆10Updated 3 years ago