Torch2Chip (MLSys, 2024)
☆56Apr 2, 2025Updated last year
Alternatives and similar repositories for torch2chip
Users that are interested in torch2chip are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆152Jul 19, 2025Updated 9 months ago
- Tender: Accelerating Large Language Models via Tensor Decompostion and Runtime Requantization (ISCA'24)☆31Jul 4, 2024Updated last year
- ☆35Dec 22, 2025Updated 4 months ago
- ☆10Nov 27, 2024Updated last year
- Benchmark tests supporting the TiledCUDA library.☆18Nov 19, 2024Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- C++ RTL simulator for EIE(https://arxiv.org/abs/1602.01528)☆24Mar 17, 2021Updated 5 years ago
- nn2FPGA converts ONNX models into FPGA dataflow accelerators with seamless ONNX Runtime integration.☆21Apr 27, 2026Updated last week
- ☆120Nov 17, 2023Updated 2 years ago
- ☆28Dec 12, 2022Updated 3 years ago
- HW/SW co-design of sentence-level energy optimizations for latency-aware multi-task NLP inference☆54Mar 24, 2024Updated 2 years ago
- ☆31Jun 8, 2022Updated 3 years ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆80Apr 26, 2026Updated last week
- ☆11Aug 4, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- RTL implementation of Flex-DPE.☆116Feb 22, 2020Updated 6 years ago
- Adaptive floating-point based numerical format for resilient deep learning☆14Apr 11, 2022Updated 4 years ago
- A bit-level sparsity-awared multiply-accumulate process element.☆19Jul 9, 2024Updated last year
- Artifact for IPDPS'21: DSXplore: Optimizing Convolutional Neural Networks via Sliding-Channel Convolutions.☆13Apr 6, 2021Updated 5 years ago
- ☆19Mar 21, 2023Updated 3 years ago
- Wraps the NVDLA project for Chipyard integration☆23Sep 2, 2025Updated 8 months ago
- ACM TODAES Best Paper Award, 2022☆34Oct 24, 2023Updated 2 years ago
- ☆32Mar 31, 2025Updated last year
- Metrics for spiking neural networks based on torchmetrics☆13Mar 27, 2023Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- SDA: Low-Bit Stable Diffusion Acceleration on Edge FPGAs☆19May 23, 2024Updated last year
- Codebase for ICML'24 paper: Learning from Students: Applying t-Distributions to Explore Accurate and Efficient Formats for LLMs☆27Jun 25, 2024Updated last year
- ☆42Mar 31, 2025Updated last year
- ☆16Feb 3, 2022Updated 4 years ago
- LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks, MICRO 2024.☆17Mar 19, 2025Updated last year
- Summer School Week 1 & 2 repo☆12Jul 1, 2022Updated 3 years ago
- Edge-MoE: Memory-Efficient Multi-Task Vision Transformer Architecture with Task-level Sparsity via Mixture-of-Experts☆138May 10, 2024Updated last year
- Quantized Attention on GPU☆44Nov 22, 2024Updated last year
- Multiple 1-stencil implementations using nvidia cuda.☆12Dec 2, 2017Updated 8 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- super-resolution; post-training quantization; model compression☆14Nov 10, 2023Updated 2 years ago
- I am developing a set of general-purpose shareable data structures for C# and Java all of whose fields are public readonly/final, and use…☆11Updated this week
- This repo contains the code for studying the interplay between quantization and sparsity methods☆26Feb 26, 2025Updated last year
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆208Jun 25, 2020Updated 5 years ago
- FPGA Innovation Design Competition:RISC-V Processor-based Hardware and Software Design in PGL22G☆12Sep 1, 2023Updated 2 years ago
- ☆14Jul 25, 2024Updated last year
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆19Oct 6, 2019Updated 6 years ago