progranism / Open-Source-FPGA-Bitcoin-MinerLinks
A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able p…
☆1,331Updated 3 years ago
Alternatives and similar repositories for Open-Source-FPGA-Bitcoin-Miner
Users that are interested in Open-Source-FPGA-Bitcoin-Miner are comparing it to the libraries listed below
Sorting:
- Hardware implementation of the SHA-256 cryptographic hash function☆343Updated 2 months ago
- A litecoin scrypt miner implemented with FPGA on-chip memory.☆288Updated 10 years ago
- Verilog Ethernet components for FPGA implementation☆2,576Updated 3 months ago
- Verilog library for ASIC and FPGA designers☆1,297Updated last year
- Verilog PCI express components☆1,321Updated last year
- Package manager and build abstraction tool for FPGA/ASIC development☆1,296Updated this week
- CPU miner for bitcoin☆994Updated 2 years ago
- VUnit is a unit testing framework for VHDL/SystemVerilog☆775Updated 3 weeks ago
- The MyHDL development repository☆1,080Updated last month
- An Open-source FPGA IP Generator☆916Updated this week
- Verilog AXI stream components for FPGA implementation☆808Updated 3 months ago
- A Bitcoin miner for the Zynq chip utilizing the Zedboard.☆106Updated last year
- A huge collection of VHDL/Verilog open-source IP cores scraped from the web☆491Updated 2 years ago
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,782Updated last week
- Modular ASIC/FPGA miner written in C, featuring overclocking, monitoring, fan speed control and remote interface capabilities.☆1,898Updated last year
- IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Techn…☆579Updated 4 years ago
- Scala based HDL☆1,796Updated last week
- Verilog UART☆487Updated 3 months ago
- SERV - The SErial RISC-V CPU☆1,593Updated this week
- Various HDL (Verilog) IP Cores☆802Updated 3 years ago
- Verilog AXI components for FPGA implementation☆1,729Updated 3 months ago
- The RIFFA development repository☆829Updated 11 months ago
- An open-source microcontroller system based on RISC-V☆957Updated last year
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆669Updated last week
- ☆617Updated 11 months ago
- ☆440Updated 5 months ago
- A small, light weight, RISC CPU soft core☆1,410Updated 4 months ago
- Icarus Verilog☆3,063Updated 3 weeks ago
- Documenting the Xilinx 7-series bit-stream format.☆803Updated 3 weeks ago
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,560Updated last week