Alternatives and similar repositories for Open-Source-FPGA-Bitcoin-Miner

Users that are interested in Open-Source-FPGA-Bitcoin-Miner are comparing it to the libraries listed below

• teknohog / Xilinx-Serial-Miner
  Bitcoin miner for Xilinx FPGAs
  ☆97Updated 11 years ago
• kramble / FPGA-Litecoin-Miner
  A litecoin scrypt miner implemented with FPGA on-chip memory.
  ☆288Updated 10 years ago
• kramble / FPGA-Blakecoin-Miner
  An open source FPGA miner for Blakecoin
  ☆51Updated 10 years ago
• stiggy87 / ZynqBTC
  A Bitcoin miner for the Zynq chip utilizing the Zedboard.
  ☆106Updated last year
• pedrorivera / SiaFpgaMiner
  VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin
  ☆62Updated 7 years ago
• teknohog / Open-Source-FPGA-Bitcoin-Miner
  A completely open source implementation of a Bitcoin Miner for Altera FPGAs. This project hopes to promote the free and open development …
  ☆51Updated 11 years ago
• kramble / DE0-Nano-BitCoin-Miner
  DE0 Nano port of fpgaminer - this is based on https://github.com/progranism/Open-Source-FPGA-Bitcoin-Miner
  ☆90Updated 10 years ago
• unixb0y / SystemVerilogSHA256
  SHA256 in (System-) Verilog / Open Source FPGA Miner
  ☆78Updated 7 years ago
• stremovsky / moneroasic
  Cryptonight Monero Verilog code for ASIC
  ☆20Updated 7 years ago
• onchipuis / mriscvcore
  A 32-bit RISC-V processor for mriscv project
  ☆58Updated 7 years ago
• secworks / sha512
  Verilog implementation of the SHA-512 hash function.
  ☆38Updated 2 months ago
• ngzhang / Icarus
  DUAL Spartan6 Development Platform
  ☆86Updated 7 years ago
• ATaylorCEngFIET / MicroZed-Chronicles
  Source code from the MicroZed Chronicles blog hosted by Xcell Daily Blog
  ☆192Updated 6 years ago
• benreynwar / pyvivado
  Python tools for Vivado Projects
  ☆73Updated 6 years ago
• onchipuis / mriscv
  A 32-bit Microcontroller featuring a RISC-V core
  ☆152Updated 7 years ago
• skordal / sha256
  A simple SHA-256 implementation in VHDL
  ☆22Updated 6 years ago
• TUM-LIS / glip
  Generic Logic Interfacing Project
  ☆46Updated 4 years ago
• peteasa / parallella
  START HERE! FPGA and Linux Development Combined
  ☆23Updated 8 years ago
• openrisc / orpsoc-cores
  Core description files for FuseSoC
  ☆124Updated 4 years ago
• eliaskousk / parallella-riscv
  RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
  ☆101Updated 6 years ago
• Poofjunior / fpga_fast_serial_sort
  a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially
  ☆40Updated 9 years ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆91Updated 5 years ago
• SpinalHDL / VexRiscvSoftcoreContest2018
  ☆63Updated 6 years ago
• fpgadeveloper / ethernet-fmc-zynq-gem
  Example design for the Ethernet FMC using the hard GEMs of the Zynq
  ☆55Updated 3 weeks ago
• hamsternz / FPGA_GigabitTx
  Sending UDP packets out over a Gigabit PHY with an FPGA.
  ☆42Updated 9 years ago
• Goshik92 / SHA256Hasher
  SHA-256 IP core for ZedBoard (Zynq SoC)
  ☆31Updated 6 years ago
• secworks / sha1
  Verilog implementation of the SHA-1 cryptgraphic hash function
  ☆52Updated 2 months ago
• jbush001 / PASC
  Parallel Array of Simple Cores. Multicore processor.
  ☆99Updated 6 years ago
• greatscottgadgets / daisho
  SuperSpeed USB 3.0 FPGA platform
  ☆257Updated 10 years ago
• cambridgehackers / fpgamake
  Generates Makefiles to synthesize, place, and route verilog using Vivado
  ☆96Updated 3 years ago