ngzhang / Icarus
DUAL Spartan6 Development Platform
☆86Updated 7 years ago
Alternatives and similar repositories for Icarus:
Users that are interested in Icarus are comparing it to the libraries listed below
- An open source FPGA miner for Blakecoin☆51Updated 10 years ago
- A litecoin scrypt miner implemented with FPGA on-chip memory.☆287Updated 10 years ago
- A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open d…☆173Updated 3 years ago
- A completely open source implementation of a Bitcoin Miner for Altera FPGAs. This project hopes to promote the free and open development …☆51Updated 11 years ago
- Bitcoin miner for Xilinx FPGAs☆97Updated 11 years ago
- DE0 Nano port of fpgaminer - this is based on https://github.com/progranism/Open-Source-FPGA-Bitcoin-Miner☆90Updated 10 years ago
- An Open Source FPGA GroestlCoin Miner☆10Updated 7 years ago
- VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin☆62Updated 7 years ago
- BTC<C 双挖芯片 / BTC<C Dual Mining ASIC☆26Updated 9 years ago
- FPGA core for SHA256d mining targeting Lattice iCE40 devices.☆21Updated 3 years ago
- SHA256 in (System-) Verilog / Open Source FPGA Miner☆78Updated 7 years ago
- Open source hardware implementation of classic CryptoNight☆37Updated last year
- A Bitcoin miner for the Zynq chip utilizing the Zedboard.☆105Updated last year
- ☆87Updated 11 years ago
- Schematics and sample projects for S9 antminer control board sold as development board☆87Updated 4 years ago
- Maetti's Fork (Ethereum) + Altera/Intel OpenCL(FPGA)☆41Updated 4 years ago
- ☆19Updated 6 years ago
- Cryptonight Monero Verilog code for ASIC☆20Updated 7 years ago
- Implementation of SHA256 Hasher with UART Transceiver in Verilog. Designed to run on Altera's DE2 FPGA Development Board.☆15Updated 6 years ago
- FPGA Development for the parallella☆19Updated 7 years ago
- Verilog implementation of the SHA-512 hash function.☆38Updated 3 years ago
- ☆37Updated 7 years ago
- ☆58Updated 3 years ago
- artix-7 PCIe dev board☆25Updated 7 years ago
- SHA-256 IP core for ZedBoard (Zynq SoC)☆31Updated 6 years ago
- DE10 NANO SHA3-256 Proof of Work Miner☆13Updated 4 years ago
- ☆65Updated 9 years ago
- A simple SHA-256 implementation in VHDL☆22Updated 6 years ago
- Virtual JTAG UART for Altera Devices☆46Updated 10 years ago
- A simplified version of an FPGA bitcoin miner☆52Updated 5 years ago