teknohog / Xilinx-Serial-MinerLinks
Bitcoin miner for Xilinx FPGAs
☆97Updated 12 years ago
Alternatives and similar repositories for Xilinx-Serial-Miner
Users that are interested in Xilinx-Serial-Miner are comparing it to the libraries listed below
Sorting:
- A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open d…☆173Updated 3 years ago
- A completely open source implementation of a Bitcoin Miner for Altera FPGAs. This project hopes to promote the free and open development …☆51Updated 11 years ago
- An open source FPGA miner for Blakecoin☆52Updated 10 years ago
- A Bitcoin miner for the Zynq chip utilizing the Zedboard.☆106Updated last year
- SHA256 in (System-) Verilog / Open Source FPGA Miner☆79Updated 7 years ago
- Verilog implementation of the SHA-512 hash function.☆38Updated 2 months ago
- A litecoin scrypt miner implemented with FPGA on-chip memory.☆288Updated 10 years ago
- DUAL Spartan6 Development Platform☆86Updated 7 years ago
- SQRL FK33 board files, example designs and scripts.☆17Updated 2 years ago
- ☆63Updated 6 years ago
- Xilinx PCIe to MIG DDR4 example designs and custom part data files☆38Updated last year
- Core description files for FuseSoC☆124Updated 5 years ago
- An Open Source FPGA GroestlCoin Miner☆10Updated 7 years ago
- FPGA Development for the parallella☆19Updated 7 years ago
- DE0 Nano port of fpgaminer - this is based on https://github.com/progranism/Open-Source-FPGA-Bitcoin-Miner☆90Updated 10 years ago
- Parallel Array of Simple Cores. Multicore processor.☆99Updated 6 years ago
- CMod-S6 SoC☆42Updated 7 years ago
- Example design for the Ethernet FMC using the hard GEMs of the Zynq☆55Updated last month
- A 32-bit RISC-V processor for mriscv project☆58Updated 7 years ago
- Bitstream relocation and manipulation tool.☆47Updated 2 years ago
- Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC☆64Updated 8 years ago
- OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores☆85Updated 4 years ago
- A small 32-bit implementation of the RISC-V architecture☆32Updated 4 years ago
- FGPU is a soft GPU architecture general purpose computing☆57Updated 4 years ago
- FPGA reference design for the the Swerv EH1 Core☆71Updated 5 years ago
- Extensible FPGA control platform☆62Updated 2 years ago
- ☆60Updated 3 years ago
- SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.☆31Updated 4 years ago
- Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).☆34Updated 8 years ago
- Project X-Ray Database: XC7 Series☆69Updated 3 years ago