dan-fritchman / NetlistLinks
Parsing and generating popular formats of circuit netlist
☆36Updated 2 years ago
Alternatives and similar repositories for Netlist
Users that are interested in Netlist are comparing it to the libraries listed below
Sorting:
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆126Updated 2 years ago
- Read Spectre PSF files☆68Updated 2 months ago
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆54Updated 8 years ago
- BAG framework☆30Updated 9 months ago
- Hardware Description Library☆84Updated 5 months ago
- Python interface for Cadence Spectre☆16Updated 2 months ago
- BAG framework☆41Updated last year
- Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.☆47Updated last month
- LAYout with Gridded Objects v2☆64Updated 3 months ago
- Verilog-A simulation models☆82Updated 2 months ago
- Interchange formats for chip design.☆33Updated 4 months ago
- Simple and most probably incomplete parser for spectre netlists☆15Updated 9 years ago
- repository for a bandgap voltage reference in SKY130 technology☆40Updated 2 years ago
- A tiny Python package to parse spice raw data files.☆53Updated 2 years ago
- ☆22Updated 4 years ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆49Updated last month
- GDS visualization, geometry analysis, and parallelized capacitance extraction at field-solver accuracy. MS thesis project.☆23Updated last year
- Intel's Analog Detailed Router☆39Updated 6 years ago
- GDS3D is an application that can interpret so called IC layouts and render them in 3D. The program accepts standard GDSII files as input …☆232Updated last year
- Files for Advanced Integrated Circuits☆30Updated 3 weeks ago
- This repo contains introduction of gm/id method and its application to some OTA design examples.☆18Updated last year
- Automatic generation of real number models from analog circuits☆44Updated last year
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆122Updated 3 weeks ago
- A Python and SKILL Framework for Cadence Virtuoso☆41Updated last year
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆56Updated last week
- Circuit release of the MAGICAL project☆38Updated 5 years ago
- Parasitic Extraction for KLayout☆29Updated last week
- LAYout with Gridded Objects☆29Updated 5 years ago
- skywater 130nm pdk☆36Updated last week
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆36Updated 2 months ago