Parsing and generating popular formats of circuit netlist
☆42Dec 10, 2022Updated 3 years ago
Alternatives and similar repositories for Netlist
Users that are interested in Netlist are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Simple and most probably incomplete parser for spectre netlists☆14Oct 4, 2016Updated 9 years ago
- ☆33Jun 23, 2023Updated 3 years ago
- Photonic Integrated ELectronics. Microservices to codesign photonics, electronics, quantum, and more.☆63Jul 1, 2025Updated last year
- mojito☆12May 1, 2018Updated 8 years ago
- Circulax is a differentiable circuit simulation framework built on JAX, Optimistix and Diffrax☆48Aug 6, 2026Updated last week
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆58Jun 30, 2017Updated 9 years ago
- LAYout with Gridded Objects v2☆69Jul 4, 2026Updated last month
- A tiny Python package to parse spice raw data files.☆54Dec 26, 2022Updated 3 years ago
- Integrated Circuit Layout☆62Feb 25, 2025Updated last year
- ☆39Apr 10, 2023Updated 3 years ago
- SPICE for the 21st Century☆38Dec 13, 2022Updated 3 years ago
- Hardware Description Library☆96Feb 17, 2026Updated 5 months ago
- Photonic circuit network simulator☆25Jul 19, 2026Updated 3 weeks ago
- Python Verilog-AMS Parser☆12Oct 13, 2015Updated 10 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Easy access to OpenSource TCAD Tools☆47Jun 25, 2026Updated last month
- code for the ICML2018 paper "Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design"☆30Jul 9, 2018Updated 8 years ago
- Layout Symmetry Annotation for Analog Circuits with GraphNeural Networks☆17Apr 7, 2023Updated 3 years ago
- Hdl21 Schematics☆17Jan 24, 2024Updated 2 years ago
- A modular hardware abstraction library☆55Aug 3, 2026Updated last week
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆38Apr 9, 2026Updated 4 months ago
- Highly parallel simulation and optimization of photonic circuits in time and frequency domain based on the deep-learning framework PyTorc…☆93Jun 16, 2022Updated 4 years ago
- Simulink model for noise shaping SAR ADC☆13Mar 17, 2020Updated 6 years ago
- Deep Reinforcement Learning of Analog Circuit Designs☆134Jun 12, 2023Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- A standalone structural (gate-level) verilog parser☆42Jul 29, 2026Updated 2 weeks ago
- Model SAR ADC with python!☆22Jul 8, 2022Updated 4 years ago
- ☆380Updated this week
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆81Jul 28, 2026Updated 2 weeks ago
- Combination of Analog Circuit Sizing and DL.☆18Mar 24, 2023Updated 3 years ago
- Python package for IBIS-AMI model development and testing☆36Updated this week
- KLayout technology files for ASAP7 FinFET educational process☆26Feb 5, 2023Updated 3 years ago
- Interchange formats for chip design.☆39Feb 15, 2026Updated 5 months ago
- Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.☆57Apr 9, 2026Updated 4 months ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Simple strutured VERILOG netlist to SPICE netlist translator☆26Jul 31, 2026Updated last week
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆136Apr 23, 2023Updated 3 years ago
- Use python for designing circuits (experimental) (deprecated in favor of https://electron-lang.org)☆62Dec 8, 2022Updated 3 years ago
- Doug is a WIP semi-automated to full manual VLSI Analog and Mixed Signal CAD design tool built with Bevy and Layout21☆19Jan 12, 2025Updated last year
- Circuit release of the MAGICAL project☆40Jan 10, 2020Updated 6 years ago
- Guides and templates for using open source RF design tools with the SkyWater SKY130 process.☆19Nov 13, 2020Updated 5 years ago
- Top level CedarEDA integration package☆26Oct 22, 2024Updated last year