Alternatives and similar repositories for iron

Users that are interested in iron are comparing it to the libraries listed below

• necst / xlnx-project-template
  Template Repository for Xilinx HLS design flow
  ☆12Updated 3 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 3 years ago
• SFU-HiAccel / rodinia-hls
  FPGA version of Rodinia in HLS C/C++
  ☆38Updated 4 years ago
• tukl-msd / DRAMPower
  Fast and accurate DRAM power and energy estimation tool
  ☆168Updated last week
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆41Updated 11 months ago
• TeCSAR-UNCC / gem5-SALAM
  ☆92Updated last year
• CMU-SAFARI / VAMPIRE
  An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …
  ☆39Updated 6 years ago
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆69Updated last year
• horizon-research / systolic-array-dataflow-optimizer
  A general framework for optimizing DNN dataflow on systolic array
  ☆39Updated 4 years ago
• UCLA-VAST / hbmbench
  ☆24Updated 4 years ago
• Xilinx / HLS_arbitrary_Precision_Types
  ☆46Updated last year
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆93Updated 9 months ago
• GT-CHIPS / gem5_chips
  gem5 repository to study chiplet-based systems
  ☆76Updated 6 years ago
• ucb-bar / gemmini-rocc-tests
  Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator
  ☆60Updated 3 weeks ago
• rapidstream-org / rapidstream-tapa
  RapidStream TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.
  ☆173Updated this week
• yonseicasl / Nebula
  Nebula: Deep Neural Network Benchmarks in C++
  ☆12Updated 6 months ago
• hlslibs / ac_ml
  Algorithmic C Machine Learning Library
  ☆25Updated 7 months ago
• Xilinx / xup_compute_acceleration
  Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware
  ☆48Updated 11 months ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆31Updated 3 years ago
• template-hls / template-hls-float
  ☆29Updated 6 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆81Updated 11 months ago
• Xilinx / Alveo-PYNQ
  Introductory examples for using PYNQ with Alveo
  ☆51Updated 2 years ago
• RC4ML / Shuhai
  Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…
  ☆111Updated last month
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆51Updated 8 years ago
• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆147Updated this week
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆110Updated last year
• hlslibs / hls_tutorials
  Tutorials on HLS Design
  ☆52Updated 5 years ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆166Updated last year
• amin-norollah / PAT-Noxim
  cycle accurate Network-on-Chip Simulator
  ☆28Updated 2 years ago
• andrewboutros / rad-flow
  The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…
  ☆38Updated last month