Image Registration on FPGAs
☆21Aug 28, 2022Updated 3 years ago
Alternatives and similar repositories for iron
Users that are interested in iron are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Template Repository for Xilinx HLS design flow☆12Nov 18, 2021Updated 4 years ago
- Starlight: A Kernel Optimizer for GPU Processing☆16Jan 10, 2024Updated 2 years ago
- Polyglot CUDA integration for the GraalVM☆18Apr 6, 2025Updated last year
- A collection of Matplotlib and Seaborn recipes and utilities collected over years of colorful plot-making☆23Nov 17, 2023Updated 2 years ago
- Userspace DMA library for Zynq-based SoCs☆16Jan 22, 2019Updated 7 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- An awesome curated list of languages and tools to program FPGAs☆75Jun 22, 2022Updated 3 years ago
- OpenMP front-end based on LLVM for CGRAs☆10Oct 2, 2022Updated 3 years ago
- Chisel Project for Integrating RTL code into SDAccel☆17Jan 12, 2018Updated 8 years ago
- Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"☆16Aug 29, 2021Updated 4 years ago
- ☆10Sep 7, 2023Updated 2 years ago
- Tuning Assistant for Floating point to Fixed point Optimization☆19Mar 26, 2022Updated 4 years ago
- ☆30Apr 26, 2019Updated 7 years ago
- ☆25Dec 1, 2020Updated 5 years ago
- ETHZ Heterogeneous Accelerated Compute Cluster.☆41Updated this week
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Telegram bot that search for free classrooms at PoliMi!☆22Sep 14, 2024Updated last year
- Multi Layer Perceptron by Vivado HLS for Xilinx FPGA implementation☆12Dec 26, 2016Updated 9 years ago
- ☆11Jul 14, 2021Updated 4 years ago
- A OpenCL-based FPGA benchmark suite for HPC☆37May 4, 2026Updated last month
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Dec 16, 2021Updated 4 years ago
- ☆39Mar 26, 2020Updated 6 years ago
- ☆11May 30, 2024Updated 2 years ago
- A Vector Caching Scheme for Streaming FPGA SpMV Accelerators☆10Sep 7, 2015Updated 10 years ago
- ☆12Sep 25, 2024Updated last year
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- FPGA version of Rodinia in HLS C/C++☆42Dec 24, 2020Updated 5 years ago
- VHDL functional blocks with their simulations and test sequences☆20May 19, 2026Updated 3 weeks ago
- This repository holds research toward analysis of lost-in-space star identification algorithms in C++.☆20Sep 23, 2019Updated 6 years ago
- This simulator models multi core systems, intended primarily for studies on main memory management techniques. It models a trace-based ou…☆12Jan 18, 2016Updated 10 years ago
- "Middleware" (infrastructure) for host-FPGA applications (e.g., accelerators)☆19Sep 26, 2024Updated last year
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Sep 14, 2020Updated 5 years ago
- A Data Science pipeline for Algorithmic Trading: A comparative study in applications to Finance and cryptoeconomics☆14Jul 1, 2022Updated 3 years ago
- Fork of gem5 with support for manycore architectures. Includes models and scripts to evaluate a software-defined-vector architecture.☆13Oct 14, 2021Updated 4 years ago
- GenStore is the first in-storage processing system designed for genome sequence analysis that greatly reduces both data movement and comp…☆15Apr 6, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Python interface to FPGA interchange format☆41Oct 19, 2022Updated 3 years ago
- Roll the dice, in elixir☆14Dec 13, 2016Updated 9 years ago
- OpenGraph is an open-source graph processing benchmarking suite written in pure C/OpenMP.☆14Apr 27, 2024Updated 2 years ago
- Python implementation of Lloyd-Max quantizer.☆24Apr 4, 2021Updated 5 years ago
- Open-Source HLS Examples for Microchip FPGAs☆55Jun 3, 2026Updated last week
- ☆13Feb 13, 2021Updated 5 years ago
- OpenGraph is an open-source graph processing benchmarking suite written in pure C/OpenMP. Integrated with Sniper simulator.☆11Apr 27, 2024Updated 2 years ago