atmughrabi / OpenGraphSim
OpenGraph is an open-source graph processing benchmarking suite written in pure C/OpenMP. Integrated with Sniper simulator.
☆11Updated 6 months ago
Related projects ⓘ
Alternatives and complementary repositories for OpenGraphSim
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆51Updated 3 years ago
- Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines☆16Updated 2 years ago
- GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing☆13Updated 2 years ago
- ☆61Updated 3 years ago
- This repo is to collect the state-of-the-art GNN hardware acceleration paper☆54Updated 3 years ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆29Updated last year
- Source code for the evaluated benchmarks and proposed cache management technique, GRASP, in [Faldu et al., HPCA'20].☆17Updated 4 years ago
- ☆18Updated 2 years ago
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆29Updated 3 months ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆37Updated 6 months ago
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆25Updated 9 months ago
- STONNE Simulator integrated into SST Simulator☆17Updated 7 months ago
- ☆9Updated 2 years ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆20Updated 6 years ago
- This is a processing-in-memory simulator which models 3D-stacked memory within gem5. Also includes the workloads used for IMPICA (In-Memo…☆43Updated 7 years ago
- Hybrid Memory Cube Simulation & Research Infrastructure☆14Updated 11 months ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆56Updated last year
- Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"☆14Updated 3 years ago
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆49Updated 5 years ago
- PUMA Compiler☆28Updated 4 years ago
- Examples of DPU programs using the UPMEM DPU SDK☆36Updated 2 months ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆74Updated last year
- ☆25Updated 3 years ago
- agile hardware-software co-design☆46Updated 2 years ago
- ☆21Updated last year
- ☆13Updated 4 years ago
- ☆12Updated last year
- Graph accelerator on FPGAs and ASICs☆12Updated 6 years ago
- ☆13Updated last month
- ☆23Updated 3 years ago