FPGA Logic Analyzer and GUI
☆155Dec 29, 2022Updated 3 years ago
Alternatives and similar repositories for enxor-logic-analyzer
Users that are interested in enxor-logic-analyzer are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.☆169Jun 24, 2021Updated 4 years ago
- ☆20Aug 2, 2025Updated 9 months ago
- 本工程用FPGA和python实现一个简单的8路输入 逻辑分析仪☆20Aug 20, 2017Updated 8 years ago
- FPGA-Based Logic Analyzer☆14Apr 18, 2016Updated 10 years ago
- An open source FPGA design for DSLogic☆171Jul 8, 2014Updated 11 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- KiCad PCB project of Logic Analyzer☆47Jan 3, 2021Updated 5 years ago
- open-source logic analyzer for FPGAs☆101Sep 5, 2018Updated 7 years ago
- FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters☆17May 26, 2021Updated 4 years ago
- FPGA工程合集-涉及图像、通信、接口、算法等，详见WIKI☆12Sep 7, 2024Updated last year
- Collection of simple interfaces for Digilent Pmods☆12Aug 3, 2023Updated 2 years ago
- A usb FPGA board based Logic analyzer （逻辑分析仪）☆17Nov 14, 2022Updated 3 years ago
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆189Mar 10, 2024Updated 2 years ago
- C# Oscilloscope Library and GUI (tested with Rigol DS1102E)☆42Apr 10, 2025Updated last year
- WIP Graphics layer and inter IC communication for the Spartan Edge Accelerator fpga/mcu hybrid board☆23Jun 4, 2022Updated 3 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- This is a C library to interface with the LiteX Firmware on Thunderscope over PCIe☆11Updated this week
- FGPU is a soft GPU-like architecture for FPGAs. It is described in VHDL, fully customizable, and can be programmed using OpenCL.☆68Dec 18, 2024Updated last year
- Build Customized FPGA Implementations for Vivado☆375Updated this week
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆38May 7, 2024Updated 2 years ago
- High-througput logic analyzer for FPGA☆17Oct 8, 2020Updated 5 years ago
- Verilog RS232 Enhanced Synch-UART & RS232 Debugger HDL core with PC host RS232 real-time Hex-editor / viewer host utility.☆12Jan 15, 2022Updated 4 years ago
- YOLO example implementation using Intuitus CNN accelerator on ZYBO ZYNQ-7000 FPGA board☆23Jul 30, 2021Updated 4 years ago
- BlackParrot on Zynq☆55Apr 21, 2026Updated last month
- Brandon's Semiconductor Simulator☆46Mar 16, 2026Updated 2 months ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Time to Digital Converter (TDC)☆36Dec 27, 2020Updated 5 years ago
- IR image processing and demo on a Zybo Z7-20 using a Raspberry Pi night vision vamera☆14Aug 30, 2021Updated 4 years ago
- Program to scan for malicious FPGA designs.☆17Mar 20, 2021Updated 5 years ago
- Vivado project for Xilinx Artix FPGA, used in logic analyzer☆14Jul 16, 2021Updated 4 years ago
- 【例程】国产高云FPGA 开发板及其工程☆48Feb 2, 2026Updated 3 months ago
- Testbenches for HDL projects☆23Updated this week
- Small footprint and configurable embedded FPGA logic analyzer☆203May 11, 2026Updated last week
- USB virtual model in C++, co-simulating with Verilog, SystemVerilog and VHDL☆33Oct 15, 2024Updated last year
- Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm☆35Oct 15, 2018Updated 7 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ASIC Design of the openSPARC Floating Point Unit☆15Mar 13, 2017Updated 9 years ago
- FPGA Hardware Simulation Framework☆23Oct 13, 2025Updated 7 months ago
- HDL libraries and projects☆1,927Updated this week
- PID controller☆25Jul 17, 2014Updated 11 years ago
- ☆10Nov 13, 2025Updated 6 months ago
- Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.☆18Sep 24, 2021Updated 4 years ago
- Projects using the Sipeed Tang Primer FPGA development board☆17Dec 6, 2020Updated 5 years ago