lekgolo167 / enxor-logic-analyzerLinks
FPGA Logic Analyzer and GUI
☆133Updated 2 years ago
Alternatives and similar repositories for enxor-logic-analyzer
Users that are interested in enxor-logic-analyzer are comparing it to the libraries listed below
Sorting:
- A full-speed device-side USB peripheral core written in Verilog.☆232Updated 2 years ago
- SD-Card controller, using either SPI, SDIO, or eMMC interfaces☆294Updated 2 months ago
- SPI Slave for FPGA in Verilog and VHDL☆201Updated last year
- USB3 PIPE interface for Xilinx 7-Series☆217Updated 3 years ago
- A collection of reusable, high-quality, peer-reviewed VHDL building blocks.☆171Updated this week
- Basic USB-CDC device core (Verilog)☆80Updated 4 years ago
- Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation☆272Updated last year
- Opensource DDR3 Controller☆347Updated last week
- SPI master and SPI slave for FPGA written in VHDL☆175Updated 4 years ago
- SPI Master for FPGA - VHDL and Verilog☆294Updated last year
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆94Updated 5 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆75Updated 2 years ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆36Updated last year
- A set of Wishbone Controlled SPI Flash Controllers☆82Updated 2 years ago
- FPGA display controller with support for VGA, DVI, and HDMI.☆230Updated 5 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆79Updated last year
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆55Updated 4 years ago
- ☆94Updated last year
- USB 2.0 Device IP Core☆68Updated 7 years ago
- Simple UART controller for FPGA written in VHDL☆98Updated 3 years ago
- Verilog digital signal processing components☆143Updated 2 years ago
- WISHBONE SD Card Controller IP Core☆124Updated 2 years ago
- Verilog UART☆172Updated 12 years ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆67Updated 3 years ago
- Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps☆64Updated 3 years ago
- Small (Q)SPI flash memory programmer in Verilog☆63Updated 2 years ago
- A Verilog implementation of DisplayPort protocol for FPGAs☆250Updated 6 years ago
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆172Updated last year
- TangPrimer-20K-example project☆198Updated 8 months ago
- A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs☆72Updated 2 years ago