malapatipoojitha / AHB2APB-BridgeLinks
☆10Updated 3 years ago
Alternatives and similar repositories for AHB2APB-Bridge
Users that are interested in AHB2APB-Bridge are comparing it to the libraries listed below
Sorting:
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆128Updated 4 years ago
- An uvm verification env for ahb2apb bridge☆54Updated 4 years ago
- yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/☆122Updated 7 years ago
- AXI总线连接器☆103Updated 5 years ago
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆95Updated 2 years ago
- Mirror of william_william/uvm-mcdf on Gitee☆25Updated 2 years ago
- AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc☆42Updated 3 years ago
- AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…☆175Updated 7 years ago
- AXI DMA 32 / 64 bits☆116Updated 11 years ago
- Verification IP for I2C protocol☆46Updated 3 years ago
- A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM☆25Updated 3 years ago
- 支持AXI总线协议的8k×8 SP SRAM☆25Updated 5 years ago
- UVM AHB VIP☆86Updated 8 months ago
- UVM testbench environment consisting of an APB driver, high level SPI controller model, and SPI verification testbench based upon an LPC2…☆13Updated 7 months ago
- IC Verification & SV Demo☆54Updated 3 years ago
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆63Updated 2 years ago
- This is the main repository for all the examples for the book Practical UVM☆201Updated 4 years ago
- Verification IP for APB protocol☆68Updated 4 years ago
- UVM examples and projects☆141Updated last month
- 数字IC秋招项目、手撕代码☆36Updated last year
- AXI Interconnect☆51Updated 3 years ago
- This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is…☆64Updated last year
- System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment☆106Updated 7 months ago
- VIP for AXI Protocol☆143Updated 3 years ago
- Comprehensive verification suite for the AHB2APB Bridge design, featuring SystemVerilog and UVM-based methodologies. 🌉🚀☆31Updated last year
- AHB/APB SRAM Inf, VCS&Verdi Sim.☆14Updated 3 years ago
- ☆41Updated last year
- 我的数字IC厂库:Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;☆93Updated 3 years ago
- APB to I2C☆43Updated 11 years ago
- A Framework for Design and Verification of Image Processing Applications using UVM☆105Updated 7 years ago