FPGA optimized RISC-V (RV32IM) implemenation
☆34Nov 1, 2020Updated 5 years ago
Alternatives and similar repositories for bonfire-cpu
Users that are interested in bonfire-cpu are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set☆67May 29, 2025Updated last year
- ☆10Nov 8, 2019Updated 6 years ago
- Library with VHDL cores implementing Advanced Microcontroller Bus Architecture 5 (AMBA5) specifications such as APB, AHB, AXI, and AXI-St…☆18Jun 20, 2026Updated 2 months ago
- A Verilog HDL model of the MOS 6502 CPU☆24Dec 14, 2025Updated 8 months ago
- Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL☆54Updated this week
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Baseband Receiver IP for GPS like DSSS signals☆43May 19, 2020Updated 6 years ago
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 3 years ago
- LatticeMico32 soft processor☆105Oct 10, 2014Updated 11 years ago
- GHDL Verilator Interface. A glue code generator for VHDL Verilog cosimulation.☆17Apr 10, 2025Updated last year
- A high throughput FFT implementation☆20Jan 17, 2022Updated 4 years ago
- APB Logic☆29Aug 6, 2026Updated 3 weeks ago
- A port of the DesignStart Cortex-M0 system to the Diligentinc Arty board☆13Sep 7, 2018Updated 7 years ago
- Code generation tool for control and status registers☆468Aug 16, 2026Updated 2 weeks ago
- ☆27Sep 3, 2020Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Some neorv32 examples for Intel FPGA boards using Quartus II and SEGGER Embedded Studio for RISC-V.☆15Oct 5, 2025Updated 10 months ago
- A simple script to build open-source FPGA tools.☆17May 11, 2020Updated 6 years ago
- soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…☆35Dec 11, 2016Updated 9 years ago
- A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz☆426Jul 10, 2026Updated last month
- RISC-V CPU implementation in Amaranth HDL (aka nMigen)☆34Aug 27, 2024Updated 2 years ago
- CMod-S6 SoC☆46Jan 6, 2018Updated 8 years ago
- USB Full-Speed core written in migen/LiteX☆12Sep 19, 2019Updated 6 years ago
- A picorv32 RISC-V processor with some very simple memory and peripherals. For Terasic DE-0 Nano☆13Apr 15, 2019Updated 7 years ago
- An open-source 32-bit RISC-V soft-core processor☆49Sep 1, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- RISC-V by VectorBlox☆12Jul 19, 2017Updated 9 years ago
- TCL framework to package Vivado IP-Cores☆13May 18, 2022Updated 4 years ago
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆25Nov 9, 2025Updated 9 months ago
- A 6800 CPU written in nMigen☆49Jun 16, 2021Updated 5 years ago
- Hardware Description Language Translator☆19Aug 7, 2026Updated 3 weeks ago
- VHDL related news.☆27Updated this week
- This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…☆21Feb 27, 2024Updated 2 years ago
- Wishbone to AXI bridge (VHDL)☆51Aug 29, 2019Updated 7 years ago
- Open Processor Architecture☆26Apr 7, 2016Updated 10 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- RISC-V processor☆32May 26, 2022Updated 4 years ago
- Library for reading Xilinx .bit bitstream file headers with metadata extraction☆14Apr 7, 2026Updated 4 months ago
- Support for automatic address map generation and address decoding logic for Wishbone connected hierachical systems☆12Mar 12, 2026Updated 5 months ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆95Aug 10, 2018Updated 8 years ago
- RISCV core RV32I/E.4 threads in a ring architecture☆34Jun 12, 2023Updated 3 years ago
- Soft-logic designs and HAL libraries for various subsystems found in Oxide hardware.☆22Updated this week
- A simple spidergon network-on-chip with wormhole switching feature☆13Mar 22, 2021Updated 5 years ago