A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA
☆24Sep 2, 2023Updated 2 years ago
Alternatives and similar repositories for mrisc32-a1
Users that are interested in mrisc32-a1 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A computer (FPGA SoC) based on the MRISC32-A1 CPU☆53Sep 2, 2023Updated 2 years ago
- MRSIC32 ISA documentation and development☆91Sep 2, 2023Updated 2 years ago
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆35Jul 15, 2024Updated 2 years ago
- crap-o-scope scope implementation for icestick☆20Jun 1, 2018Updated 8 years ago
- A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set☆66May 29, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- VexRiscv-SMP integration test with LiteX.☆26Nov 16, 2020Updated 5 years ago
- Custom 64-bit pipelined RISC processor☆18Dec 8, 2025Updated 7 months ago
- A minimal complexity fpga board☆13Jun 1, 2022Updated 4 years ago
- Interface for exposing raw NAND i/o over UART to enable pc-side modification.☆20Jan 28, 2018Updated 8 years ago
- A pipelined cordic algoithm for computing cos(angle) and sin(angle) in verilog☆19May 29, 2017Updated 9 years ago
- Open Processor Architecture☆26Apr 7, 2016Updated 10 years ago
- Pipelined DCPU-16 Verilog Implementation☆42May 30, 2012Updated 14 years ago
- A 6800 CPU written in nMigen☆49Jun 16, 2021Updated 5 years ago
- ECE 5745 Tutorial 8: SRAM Generators☆17Mar 5, 2022Updated 4 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆11Jul 16, 2020Updated 6 years ago
- Small Stack-Based Computer Compiler -- Verilog micro controller for FPGA housekeeping with peripherals☆16Jan 11, 2020Updated 6 years ago
- SD/MMC Analyzer for Saleae Logic☆40Mar 18, 2024Updated 2 years ago
- Verilog source code for book: Computer Architecture Tutorial☆27Oct 12, 2021Updated 4 years ago
- RISC-V Processor written in Amaranth HDL☆40Jan 21, 2022Updated 4 years ago
- Monitor and display signal waveforms from your MyHDL/nMigen digital design in a Jupyter notebook.☆40Jan 22, 2026Updated 6 months ago
- ☆14Jul 17, 2020Updated 6 years ago
- ☆11Jul 16, 2020Updated 6 years ago
- XVCD implementation for ANITA. Note that "ftdi_xvc_core.c" is a generic libftdi-based MPSSE XVC handler, and is awesome.☆19Jul 10, 2020Updated 6 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- ESP32 based C64 keyboard to bluetooth adapter☆11May 22, 2020Updated 6 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆25Jan 12, 2020Updated 6 years ago
- RCA COSMAC CDP1802 functional equivalent CPU core in VHDL☆29Jan 7, 2018Updated 8 years ago
- Firmware for the MEGA65 DM65PIC☆10Jul 11, 2021Updated 5 years ago
- ☆14Oct 19, 2018Updated 7 years ago
- ☆11Jul 4, 2023Updated 3 years ago
- openMSP430 CPU core (from OpenCores)☆22Oct 14, 2022Updated 3 years ago
- Tiny CPU is a small 32-bit CPU done mostly as a hobby for educational purposes.☆36Jan 17, 2012Updated 14 years ago
- Various tutorials for coding in 45gs02 on the Mega65☆12Dec 24, 2025Updated 7 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Cleaned up headers derived from reverse engineering UXKit.framework☆16Sep 7, 2018Updated 7 years ago
- ZX-Uno port for MEGA65 delivering a fully fledged ZX Spectrum 48k and 128k☆14Oct 13, 2024Updated last year
- Small footprint and configurable HyperBus core☆14Jul 6, 2022Updated 4 years ago
- ☆14Jul 17, 2020Updated 6 years ago
- Command line tools to display and configure Parrot Zik2 Headphones☆12Jan 18, 2016Updated 10 years ago
- Pan's 1st Gen RISC-V SoC, contains a 12T multicycle RISC-V32ia core, with an EMIF-like simple bus☆16Oct 21, 2020Updated 5 years ago
- Complete ASIC Design of UART Interface with Baud Rate Selection :- RTL to GDS2☆13Sep 3, 2019Updated 6 years ago