一种基于FPGA平台的实时视频去雾系统项目代码，其中bit流文件可以直接下载到PYNQ-Z2开发板上，通过usb和hdmi设备输入有雾视频，将去雾后的视频输出到显示屏上。c++源代码部分是我们的去雾IP核的源代码。
☆20Nov 24, 2019Updated 6 years ago
Alternatives and similar repositories for img_defog
Users that are interested in img_defog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Uart transport + image processing + VGA display 基于FPGA的图像处理，包括Uart和VGA☆22Mar 10, 2020Updated 6 years ago
- 基于FPGA-Pynq的车牌识别系统。The LPR system of FPGA-Pynq☆13Mar 22, 2019Updated 7 years ago
- Matlab codes for the paper “Distributed multi-stream beamforming in MIMO multi-relay interference networks,” by C. M. Yetis and R. Y. Cha…☆14Feb 9, 2025Updated last year
- 本项目使用 Vivado 和 SDK 工程软件上完成系统设计和生成相关部署文件，并在 ARM＋FPGA 完成项目部署，实现通过摄取图片并通过 ARM＋FPGA 综合部署和加速识别算法，并通过显示驱动，在显示屏上显示摄像头原图和识别结果。☆10Aug 12, 2022Updated 3 years ago
- Use OpenCV DNN module to load Tiny Yolov3 weights and cfg files for detection.☆12Jul 14, 2019Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- MATLAB simulation code for dissertation project report☆14Sep 4, 2022Updated 3 years ago
- 【2023全国大学生FPGA 创新设计竞赛】全国二等奖作品：Cortex-M0智能飞机大战游戏机 开源项目☆22Jul 13, 2024Updated last year
- Transforming RIS-Assidted Passive Beamforming from Tedious to Simple: A Relaxation Algorithm for Ricain Channel☆12Nov 10, 2022Updated 3 years ago
- Ethernet 10GE MAC☆47Jul 17, 2014Updated 11 years ago
- This is a open source project from UVM Community and it is based on an Ethernet Switch System-on-Chip (SoC).☆15May 16, 2021Updated 5 years ago
- OpenAI-compatible HTTP server for OmniVoice text-to-speech☆64Jun 8, 2026Updated last week
- Example Codes for Snorkeling in Verilog Bay☆17Sep 9, 2016Updated 9 years ago
- Real-time Video Dehazing based on Spatio-temporal MRF☆21Aug 9, 2018Updated 7 years ago
- Signal generator designed with Nexy4 FPGA☆13May 14, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Awesome Skills from Around the World☆184Updated this week
- 本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛（高云赛道）项目，题目基于高云FPGA的多路网络视频监控编码系统。☆70Dec 11, 2023Updated 2 years ago
- 开发环境是Windows 10, Quartus。硬件开发语言是Verilog。 利用FPGA开发的智能小车，分为两个部分，控制器部分和小车部分，通过蓝牙信号进行连接。 控制部分可以通过加速度传感器检测手势，从而控制小车的前后左右。 加速度传感器还可以检测人体是否摔倒…☆14Mar 10, 2019Updated 7 years ago
- implementation in verilog rtl for an FPGA to detect the presence of a face in an image☆11Mar 12, 2021Updated 5 years ago
- Conversion of Electrocardiography paper records to binarization and converting to digital form in order to extract features to feed in th…☆10Dec 16, 2020Updated 5 years ago
- This work is based on PYNQ-Z2 development board provided by organizer, and adopts the cooperation scheme of hardware and software to buil…☆44Feb 17, 2019Updated 7 years ago
- Hand Writing Digital Recognization Based on FPGA, we desiged a SoC embeded a Cortex M3 core and other peripherals，this SoC run a CNN. The…☆14Mar 30, 2023Updated 3 years ago
- Nexys 4 DDR Artix-7☆11Jun 15, 2018Updated 8 years ago
- 无人车感知组的技术文章，教程☆18Jan 17, 2019Updated 7 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Multi Layer Perceptron by Vivado HLS for Xilinx FPGA implementation☆12Dec 26, 2016Updated 9 years ago
- Stereo vision core implemented on an FPGA using HLS☆12Apr 12, 2013Updated 13 years ago
- 基于FPGA的cifar-10二维卷积识别任务☆12Sep 8, 2022Updated 3 years ago
- 🎙️ CosyVoice All-in-One Docker - Production-ready TTS with Web UI, REST API & Voice Cloning☆71Jan 18, 2026Updated 5 months ago
- An Synthesizable Deep Learning Library based on Xilinx High Level Synthesis(HLS) tool☆16Feb 20, 2017Updated 9 years ago
- FPGA-based Fully Digital FM Transmitter using SDR (Software-Defined Radio) techniquies as up-converter using hpsdm, comb filters, cordic …☆16Mar 15, 2021Updated 5 years ago
- 车牌识别,FPGA,2019全国大学生集成电路创新创业大赛☆168Dec 8, 2019Updated 6 years ago
- Matlab code of the paper: N. T. Do, D. B. da Costa, T. Q. Duong, V. N. Q. Bao, and B. An, “Exploiting direct links in multiuser multirela…☆18Mar 3, 2022Updated 4 years ago
- 基于龙芯 OpenMIPS 实现一个具有 89 条指令的五级流水 CPU，使用 Verilog 语言，使用哈佛结构，包括逻辑移位指令、乘除法指令、加载存储指令、转移指令、协处理器访问指令以及异常相关在内的共89条指令。能够处理数据相关，包含流水线暂停以及延迟槽☆20Mar 8, 2020Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Realization of Lane Detection on CPU and implementation on FPGA using SDSOC and VIVADO. Key terms for used softwares: C++, OpenCV, xfOpe…☆21Apr 13, 2020Updated 6 years ago
- 帧差法运动目标检测，基于ZYNQ7020☆85Jul 9, 2021Updated 4 years ago
- 基于verilog实现了ISP图像处理IP(Altera EP4CE6)☆25Jul 15, 2022Updated 3 years ago
- predicting linear regression with prediction intervals☆15Jul 9, 2016Updated 9 years ago
- Migrate Xilinx edge AI solution to PYNQ☆17Nov 3, 2020Updated 5 years ago
- Endoscopy Compter Vision Challenges (EAD2020, EDD2020)☆14Feb 20, 2020Updated 6 years ago
- Implementation of the paper : Not all attention is needed - Gated Attention Network for Sequence Data (GA-Net) [https://arxiv.org/abs/191…☆13Aug 20, 2020Updated 5 years ago