Alternatives and similar repositories for venus

Users that are interested in venus are comparing it to the libraries listed below

• ThaumicMekanism / venus
  RISC-V instruction set simulator built for education
  ☆160Updated 3 years ago
• jlpteaching / dinocpu
  A teaching-focused RISC-V CPU design used at UC Davis
  ☆150Updated 2 years ago
• skyzh / RISCV-Simulator
  💻 RISC-V Simulator of RV32I ISA. 5-stage pipeline / out-of-order execution with Tomasulo algorithm and Speculation. Support runtime visu…
  ☆206Updated 5 years ago
• jameslzhu / riscv-card
  An unofficial assembly reference for RISC-V.
  ☆514Updated last year
• riscvarchive / educational-materials
  Educational materials for RISC-V
  ☆225Updated 4 years ago
• riscv / riscv-bitmanip
  Working draft of the proposed RISC-V Bitmanipulation extension
  ☆216Updated last year
• hehao98 / RISCV-Simulator
  A Simple RISC-V CPU Simulator with 5 Stage Pipeline, Branch Prediction and Cache Simulation
  ☆200Updated last year
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆162Updated 3 years ago
• ucb-bar / riscv-torture
  RISC-V Torture Test
  ☆204Updated last year
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆671Updated 2 months ago
• ucb-bar / riscv-mini
  Simple RISC-V 3-stage Pipeline in Chisel
  ☆600Updated last year
• riscvarchive / riscv-code-size-reduction
  ☆147Updated last year
• csail-csg / riscy-OOO
  RiscyOO: RISC-V Out-of-Order Processor
  ☆166Updated 5 years ago
• andrescv / jupiter
  RISC-V Assembler and Runtime Simulator
  ☆436Updated last year
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆150Updated last week
• riscvarchive / riscv-gcc
  ☆373Updated 2 years ago
• riscv / sail-riscv
  Sail RISC-V model
  ☆632Updated last week
• riscv / riscv-p-spec
  RISC-V Packed SIMD Extension
  ☆152Updated last month
• riscvarchive / risc-v-getting-started-guide
  The official RISC-V getting started guide
  ☆202Updated last year
• riscv / riscv-plic-spec
  PLIC Specification
  ☆150Updated 3 months ago
• riscv / riscv-opcodes
  RISC-V Opcodes
  ☆816Updated last week
• masc-ucsc / esesc
  ESESC: A Fast Multicore Simulator
  ☆140Updated last month
• riscv / riscv-fast-interrupt
  Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
  ☆283Updated this week
• bluespec / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆180Updated 7 months ago
• ucb-bar / riscv-sodor
  educational microarchitectures for risc-v isa
  ☆726Updated 3 months ago
• litmus-tests / litmus-tests-riscv
  RISC-V architecture concurrency model litmus tests
  ☆93Updated 6 months ago
• johnwinans / rvalp
  RISC-V Assembly Language Programming
  ☆241Updated last year
• riscv-software-src / homebrew-riscv
  homebrew (macOS) packages for RISC-V toolchain
  ☆357Updated 3 months ago
• shioyadan / Konata
  Konata is an instruction pipeline visualizer for Onikiri2-Kanata/Gem5-O3PipeView formats. You can download the pre-built binaries from ht…
  ☆502Updated last year
• riscv-ovpsim / imperas-riscv-tests
  ☆190Updated 2 years ago