Alternatives and similar repositories for asplos22-hardware-debugging-artifact

Users that are interested in asplos22-hardware-debugging-artifact are comparing it to the libraries listed below

• ekiwi / simulator-independent-coverage
  Project Repo for the Simulator Independent Coverage Research
  ☆19Updated 2 years ago
• ekiwi / rtl-fuzz-lab
  A Modular Open-Source Hardware Fuzzing Framework
  ☆33Updated 3 years ago
• rzhang2285 / Coppelia
  Code repository for Coppelia tool
  ☆23Updated 4 years ago
• dian-lun-lin / GenFuzz
  GPU-enabled Hardware Fuzzer using Genetic Algorithm
  ☆17Updated last year
• UCLA-SEAL / HeteroGen
  HeteroGen: transpiling C to heterogeneous HLS code with automated test generation and program repair (ASPLOS 2022)
  ☆17Updated 7 months ago
• efeslab / hardware-bugbase
  ☆18Updated 11 months ago
• comparch-security / cache-model
  A behavioural cache model for analysing the cache behaviour under side-channel attack.
  ☆25Updated 7 months ago
• iscas-tis / CHA
  ☆19Updated 10 months ago
• morenes / AutoCC
  Methodology that leverages FPV to automatically discover covert channels in hardware that is time-shared between processes. AutoCC operat…
  ☆17Updated 6 months ago
• makaimann / ride-core-demo
  A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core
  ☆12Updated 5 years ago
• ymanerka / ccicheck
  ☆9Updated 9 years ago
• ymanerka / rtlcheck
  RTLCheck
  ☆21Updated 6 years ago
• yaohsiaopid / rtl2uspec
  ☆11Updated last year
• hammad-a / verilog_repair
  Automated Repair of Verilog Hardware Descriptions
  ☆31Updated 3 months ago
• melver / mc2lib
  Memory consistency model checking and test generation library.
  ☆15Updated 8 years ago
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆25Updated last year
• upscale-project / generic-sqed-demo
  ☆13Updated 4 years ago
• mit-plv / hemiola
  A Coq framework to support structural design and proof of hardware cache-coherence protocols
  ☆13Updated 3 years ago
• CoriolisSP / FuzzBtor2
  Random Generator of Btor2 Files
  ☆10Updated last year
• iscas-tis / riscv-spec-core
  Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.
  ☆14Updated 3 weeks ago
• skmuduli92 / HyperFuzzer
  ☆16Updated 3 years ago
• PrincetonUniversity / IMDb-Archive
  ILA Model Database
  ☆22Updated 4 years ago
• ekiwi / rtl-repair
  Fast Symbolic Repair of Hardware Design Code
  ☆22Updated 3 months ago
• achieve-lab / assertion_data_for_LLM
  ☆14Updated 3 months ago
• aakahlow / gem5Valid_Haswell
  ☆18Updated 5 years ago
• ics-jku / spinalfuzz
  Fuzzing for SpinalHDL
  ☆16Updated 2 years ago
• cucapra / patronus
  work in progress, playing around with btor2 in rust
  ☆11Updated 3 months ago
• zilongwang123 / LeaVe
  A tool for checking the contract satisfaction for hardware designs
  ☆10Updated 5 months ago
• IntelLabs / pycaliper
  PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g.,…
  ☆22Updated 4 months ago
• gururaj-s / cleanupspec
  CleanupSpec (MICRO-2019)
  ☆17Updated 4 years ago