Alternatives and similar repositories for pyriscv

Users that are interested in pyriscv are comparing it to the libraries listed below

• lingscale / cc01
  ☆31Updated 4 months ago
• LiHao217 / RISC-V_article_paper_src
  riscv资料、论文等
  ☆143Updated 6 years ago
• PulseRain / Reindeer
  PulseRain Reindeer - RISCV RV32I[M] Soft CPU
  ☆128Updated 5 years ago
• chipsalliance / rocket-tools
  Software tools that support rocket-chip (GNU toolchain, ISA simulator, tests)
  ☆55Updated last year
• zhouqinghua / zqh_riscv
  zqh_riscv is an open source SOC system based on riscv core and tilelink NOC bus. coding with PHGL language(python DSL language). this pro…
  ☆37Updated 3 years ago
• zhangly / azpr_cpu
  用Altera FPGA芯片自制CPU
  ☆41Updated 10 years ago
• rgwan / kamikaze
  Light-weight RISC-V RV32IMC microcontroller core.
  ☆104Updated 8 years ago
• XUANTIE-RV / opene906
  OpenXuantie - OpenE906 Core
  ☆139Updated last year
• Lichee-Pi / Tang_E203_Mini
  LicheeTang 蜂鸟E203 Core
  ☆196Updated 6 years ago
• SI-RISCV / hbird-e-sdk
  Deprecated, please go to https://github.com/riscv-mcu/hbird-sdk/
  ☆111Updated 4 years ago
• x-epic / EpicSim
  EpicSim Project
  ☆71Updated 4 years ago
• microdynamics-cpu / tree-core-cpu
  A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, …
  ☆41Updated last year
• redpanda3 / chisel-book
  Hardware design with Chisel
  ☆33Updated 2 years ago
• riscv-mcu / hbird-sdk
  OpenSource HummingBird RISC-V Software Development Kit
  ☆158Updated last year
• freecores / 8051
  8051 core
  ☆107Updated 11 years ago
• wuhanstudio / picorv32_tang
  A 32-bit RISC-V SoC on FPGA that supports RT-Thread.
  ☆28Updated last year
• TYOD-SOC / RISCV-Accelerator
  ☆36Updated 6 years ago
• jijingg / Spinal-bootcamp
  SpinalHDL-tutorial based on Jupyter Notebook
  ☆138Updated last year
• cnrv / RISCV-East-Asia-Biweekly-Sync
  Biweekly Sync Meeting for RISC-V Software Ecosystem. Meeting time is more friendly for people living in East Asia.
  ☆23Updated last week
• risclite / ARM9-compatible-soft-CPU-core
  This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone be…
  ☆88Updated 4 years ago
• riscv-boom / fpga-zynq
  Support for Rocket Chip on Zynq FPGAs
  ☆40Updated 6 years ago
• illustris / FreeRTOS-RISCV
  A port of FreeRTOS for the RISC-V ISA
  ☆76Updated 6 years ago
• riscv-boom / riscv-coremark
  Setup scripts and files needed to compile CoreMark on RISC-V
  ☆69Updated 11 months ago
• microdynamics-cpu / tree-core-ide
  The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…
  ☆107Updated 2 years ago
• IBM / rocc-software
  C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)
  ☆54Updated 5 years ago
• chsasank / ARM7
  Implemetation of pipelined ARM7TDMI processor in Verilog
  ☆90Updated 7 years ago
• risclite / SuperScalar-RISCV-CPU
  SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.
  ☆217Updated 4 years ago
• whutddk / Rift2Core
  Based on Chisel3, Rift2Core is a 9-stage, out-of-order, 64-bits RISC-V Core, which supports RV64GC.
  ☆40Updated last year
• nju-mips / noop-lo
  A simple OoO processor developed by njuallen and wierton, it won 2nd prize in LoongsonCup18.
  ☆28Updated 5 years ago
• ultraembedded / exactstep
  Instruction set simulator for RISC-V, MIPS and ARM-v6m
  ☆101Updated 3 years ago