EpicSim Project
☆71Mar 1, 2021Updated 5 years ago
Alternatives and similar repositories for EpicSim
Users that are interested in EpicSim are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆20Mar 1, 2021Updated 5 years ago
- The source code that empowers OpenROAD Cloud☆15Jun 29, 2020Updated 6 years ago
- Synthesiser for Asynchronous Verilog Language☆20Oct 29, 2014Updated 12 years ago
- VHDL/Verilog/SystemC code generator, simulator API written in python/c++☆226Oct 16, 2026Updated 2 weeks ago
- RISC-V RV32I CPU written in verilog☆10Jul 11, 2020Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Provides a packaged collection of open source EDA tools☆12Apr 14, 2019Updated 7 years ago
- FACE: Fast and Customizable Sorting Accelerator☆11Sep 6, 2016Updated 10 years ago
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆66Apr 8, 2026Updated 6 months ago
- Open-source, evidence-driven MCP server for RTL simulation debugging: correlate VCS/Xcelium logs, VCD/FSDB waveforms, SystemVerilog/UVM s…☆125Oct 13, 2026Updated 2 weeks ago
- Open source EDA chip design flow☆53Mar 15, 2017Updated 9 years ago
- VCML integration of Nvidia's NVDLA SystemC model☆14Apr 13, 2021Updated 5 years ago
- Parsing library for BLIF netlists☆19Nov 1, 2024Updated last year
- A c project for EDIF format parse.☆14May 10, 2016Updated 10 years ago
- Source codes and calibration scripts for clock tree synthesis☆40Feb 18, 2020Updated 6 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Wrapper for ETH Ariane Core☆21Sep 2, 2025Updated last year
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆50Jan 6, 2022Updated 4 years ago
- FPU Generator☆21Updated this week
- Async-Karin is an asynchronous framework for FPGA written in Verilog. It has been tested on a Xilinx Artix-7 board and an Altera Cyclone-…☆30Dec 14, 2020Updated 5 years ago
- This is a clone of an SVN repository at http://svn.code.sf.net/p/edif2kicad/code. It had been cloned by http://svn2github.com/ , but the …☆12Jun 7, 2016Updated 10 years ago
- PyMTL3 wrapper of the Berkeley Hardfloat IP☆10Aug 9, 2023Updated 3 years ago
- Backup: Library implementing a C TLM-2 style to bridge C models to SystemC TLM-2.0 (C++) from GreenSocs (https://git.greensocs.com/tlm/tl…☆20Aug 13, 2018Updated 8 years ago
- Governance-related CHIPS Alliance documents, guides etc.☆10Feb 20, 2023Updated 3 years ago
- ☆16Sep 14, 2020Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Intel's Analog Detailed Router☆43Jul 18, 2019Updated 7 years ago
- SystemC Configuration, Control and Inspection (CCI)☆22Jul 7, 2026Updated 3 months ago
- A mirror of the upstream binutils-gdb repository for ARC specific work☆16Oct 21, 2026Updated last week
- Single, dual, quad, eight, and sixteen-shader GP-GPU-Compute engines, along with 32-bit SYMPL RISC CPU and Coarse-Grained Scheduler, in o…☆22Jan 2, 2019Updated 7 years ago
- RISC-V GPGPU☆40Mar 6, 2020Updated 6 years ago
- The PE for the second generation CGRA (garnet).☆18Updated this week
- Generate UVM testbench framework template files with Python 3☆26Dec 23, 2019Updated 6 years ago
- A simple BLIF (berkeley logic interchange format) parser☆11Dec 11, 2023Updated 2 years ago
- A GPT-GNN based verilog netlist partitioner for 3D IC design☆12Jul 9, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Cross platform, open source IC layout editor☆16Oct 26, 2025Updated last year
- Chisel/Firrtl execution engine☆157Aug 21, 2024Updated 2 years ago
- Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated☆241Dec 22, 2025Updated 10 months ago
- Workspace Integration Tool☆23Nov 6, 2020Updated 5 years ago
- Icarus Verilog☆3,708Updated this week
- A prototype GUI for chisel-development☆51Jun 9, 2020Updated 6 years ago
- ☆18Sep 2, 2020Updated 6 years ago