FPGA Clock Configuration Device Driver for Linux
☆32Dec 4, 2025Updated 5 months ago
Alternatives and similar repositories for fclkcfg
Users that are interested in fclkcfg are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Repository of HW design and SW for Ultra96 board + MIPI board☆17Feb 22, 2019Updated 7 years ago
- FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)☆133Aug 14, 2025Updated 9 months ago
- Templates for various types of engineering documents that I find useful☆10Feb 26, 2019Updated 7 years ago
- Get Moving with Pynq on Alveo U50☆13Jul 13, 2020Updated 5 years ago
- Booting multi-processors on x86 bare-metal.☆12Feb 25, 2022Updated 4 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Example project that uses the AXI DMA peripheral to connect a custom AXI-Stream peripheral to memory☆14Feb 28, 2014Updated 12 years ago
- PYNQ bindings for C and C++ to avoid requiring Python or Vitis to execute hardware acceleration.☆31Apr 9, 2026Updated last month
- Run ethash opencl kernel on Xilinx's Alveo U50☆17Mar 4, 2021Updated 5 years ago
- ☆10Jan 15, 2023Updated 3 years ago
- ☆11Feb 19, 2026Updated 3 months ago
- Atom Hardware IDE☆13May 4, 2021Updated 5 years ago
- ☆20May 8, 2012Updated 14 years ago
- An UGV-system using SoC-FPGA developed for FPGA design competition held on ICFPT2019☆18Jun 15, 2020Updated 5 years ago
- CNN Accelerator for Zynq☆13Dec 27, 2019Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This is a step by step guide to build OpenCV with Extra Modules for Python (Anaconda) for Windows without errors. Paticularly, I will use…☆14Mar 30, 2020Updated 6 years ago
- A small c compiler in Go☆10Jun 2, 2016Updated 9 years ago
- ☆11Oct 6, 2025Updated 7 months ago
- This C program broadcasts FM radio on Raspberry Pi 2, and it can receive pipe data besides wav files.☆12Aug 24, 2015Updated 10 years ago
- Capture The Flag Shitty Addon☆11Nov 2, 2019Updated 6 years ago
- Linux device tree generator for the Xilinx SDK (Vivado > 2014.1)☆233May 14, 2026Updated 2 weeks ago
- REAPR (Reconfigurable Engine for Automata Processing) is a general-purpose framework for accelerating automata processing applications su…☆16Jun 29, 2019Updated 6 years ago
- FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de1…☆170Nov 12, 2025Updated 6 months ago
- This is our Compiler Design project for 6th semester.☆12May 15, 2022Updated 4 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- HOG + SVM on FPGA☆28Dec 16, 2020Updated 5 years ago
- Neural Engine, 16 input channels☆16Oct 31, 2022Updated 3 years ago
- HiKoB OpenLab drivers and applications source code☆17Jun 13, 2016Updated 9 years ago
- An OpenAI-powered triage bot for a slack support channel designed to tag oncalls, prioritize issues, suggest solutions, and streamline co…☆12Jun 11, 2025Updated 11 months ago
- A CircuitPython driver library for interfacing with the Cirque Pinnacle (1CA027) touch controller ASIC used in Cirque Circle Trackpads.☆20Apr 14, 2026Updated last month
- Custom IP project for the MicroZed☆18Feb 26, 2021Updated 5 years ago
- An exact Bayesian network structure learning software based on dynamic programming.☆14Apr 2, 2026Updated last month
- iDEA FPGA Soft Processor☆17Jun 9, 2016Updated 9 years ago
- Stencil with Optimized Dataflow Architecture☆18Feb 27, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- whatever it means☆16May 19, 2026Updated last week
- SHARP X1 (CZ-800 series) compatible free IPL ROM.☆13Feb 23, 2022Updated 4 years ago
- A repo of basic Verilog/SystemVerilog modules useful in other circuits.☆21Nov 18, 2017Updated 8 years ago
- Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency☆20May 30, 2019Updated 6 years ago
- Implementation VexRiscv on ultra96☆13Apr 18, 2022Updated 4 years ago
- Reconfigurable Binary Engine☆17Mar 23, 2021Updated 5 years ago
- Package Xilinx FPGA tools into docker containers, useful for CI situations.☆17Oct 20, 2014Updated 11 years ago