ichi4096 / vivado-on-silicon-mac
Installs Vivado on M1/M2/M3 macs
☆405Updated 6 months ago
Alternatives and similar repositories for vivado-on-silicon-mac:
Users that are interested in vivado-on-silicon-mac are comparing it to the libraries listed below
- VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!☆608Updated 3 weeks ago
- A git-friendly Vivado wrapper☆233Updated 11 months ago
- SystemVerilog to Verilog conversion☆616Updated 2 weeks ago
- Multi-platform nightly builds of open source digital design and verification tools☆1,025Updated this week
- ☆431Updated 3 months ago
- FOSS Flow For FPGA☆384Updated 3 months ago
- Bus bridges and other odds and ends☆544Updated last week
- Common SystemVerilog components☆601Updated last week
- A huge VHDL library for FPGA development☆382Updated this week
- Opensource DDR3 Controller☆315Updated this week
- An Open-source FPGA IP Generator☆898Updated last week
- Open Logic FPGA Standard Library☆577Updated this week
- Verilog UART☆474Updated last month
- SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows☆444Updated last week
- ☆670Updated 5 months ago
- AXI, AXI stream, Ethernet, and PCIe components in System Verilog☆188Updated last week
- lowRISC Style Guides☆419Updated 7 months ago
- HDL support for VS Code☆318Updated last week
- ☆286Updated last week
- Verilog I2C interface for FPGA implementation☆602Updated last month
- A DDR3 memory controller in Verilog for various FPGAs☆439Updated 3 years ago
- A collection of Master XDC files for Digilent FPGA and Zynq boards.☆572Updated 5 months ago
- Verilog AXI stream components for FPGA implementation☆796Updated last month
- ☆613Updated 9 months ago
- UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …☆397Updated last week
- ☆198Updated last month
- SPI Master for FPGA - VHDL and Verilog☆280Updated last year
- synthesiseable ieee 754 floating point library in verilog☆611Updated 2 years ago
- BaseJump STL: A Standard Template Library for SystemVerilog☆568Updated last week
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆480Updated 2 months ago