DPLL for phase-locking to 1PPS signal
☆35Jul 25, 2016Updated 10 years ago
Alternatives and similar repositories for 1PPS-DPLL
Users that are interested in 1PPS-DPLL are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A Real Time Clock core for FPGA's☆31Jan 17, 2024Updated 2 years ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆33Sep 1, 2022Updated 3 years ago
- Skeletal repository for GNU Radio WBFM implementation on Pynq board☆13Jun 15, 2017Updated 9 years ago
- ☆12Oct 24, 2020Updated 5 years ago
- A collection of phase locked loop (PLL) related projects☆122Jan 18, 2024Updated 2 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- 32-bit RISC-V based processor with memory controler☆16Sep 2, 2022Updated 3 years ago
- iCEstick iCE40-HX1K FPGA hacks ~ iCEfm FM Transmitter☆18Nov 24, 2025Updated 8 months ago
- Simple key value pairs store only integer and string types.☆11Nov 5, 2018Updated 7 years ago
- ☆23Jun 14, 2026Updated 2 months ago
- A simple SystemVerilog digital phase-locked loop based (roughly) on TI's SDLA005B application note. The design includes a SystemVerilog t…☆16Aug 29, 2022Updated 3 years ago
- Power analysis of the ICE40UP5K-SG48 devices☆38Sep 26, 2020Updated 5 years ago
- GPS Disciplined Oscillator for high-precision timekeeping. More accurate than my Rubidium-based atomic clock.☆33Jun 9, 2019Updated 7 years ago
- LiteX project for the ButterStick bootloader☆14Mar 13, 2023Updated 3 years ago
- Sample code for integrating LightWare rangefinders into various platforms.☆10Oct 22, 2025Updated 9 months ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- An OpenFlow implementation for the NetFPGA-10G card☆19Feb 18, 2015Updated 11 years ago
- Nirah is a project aimed at automatically wrapping verilator C++ models in python in order for high level, extendable control and verific…☆12Mar 6, 2019Updated 7 years ago
- USB3 super speed development board useful as FPGA expansion based on WCH-Tech CH569☆31Dec 20, 2022Updated 3 years ago
- Experiments with self-synchronizing LFSR scramblers☆16Oct 11, 2020Updated 5 years ago
- A Docker image for NFS-Ganesha (NFSv4 only).☆11Apr 1, 2026Updated 4 months ago
- ☆21Jun 14, 2026Updated 2 months ago
- Time to Digital Converter (TDC)☆38Dec 27, 2020Updated 5 years ago
- 100 MB/s Ethernet MAC Layer Switch☆15Jul 17, 2014Updated 12 years ago
- ATtiny13/25/45/85 16-bit PRNG (Pseudo Random Number Generator) library based on Galois LFSR algorithm.☆10Dec 12, 2017Updated 8 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- KR260 Ubuntu 22.04 firmware. Package for enabling hardware acceleration capabilities in ROS 2 Humble with KR260 and Ubuntu 22.04.☆12Nov 9, 2022Updated 3 years ago
- 16-APSK DVB-S2 Transmitter for BladeRF☆22Jul 20, 2022Updated 4 years ago
- ☆27Jun 12, 2022Updated 4 years ago
- Tutorials available here:☆41Apr 7, 2026Updated 4 months ago
- FPGA implementation of a CDR targeting a Xilinx Kintex-7 for data rates up to 250 MHz☆20Nov 15, 2021Updated 4 years ago
- RV32I Single Cycle Processor (CPU)☆12Nov 14, 2021Updated 4 years ago
- Wine fakedlls (32 and 64 bit) for running windows apps that support SDRPlay on linux with wine☆11Jan 17, 2016Updated 10 years ago
- ☆11Dec 19, 2016Updated 9 years ago
- Glacial - microcoded RISC-V core designed for low FPGA resource utilization☆88Oct 29, 2019Updated 6 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- HeiChips 2025 Tapeout on IHP SG13G2 130nm process☆23Apr 10, 2026Updated 4 months ago
- Basic Pong you can extend with rotary, sound, vga generator and autopilot☆11Oct 26, 2021Updated 4 years ago
- Slides and material for Xilinx bootcamp☆22Aug 6, 2021Updated 5 years ago
- Docker files from Ettus Research☆16Jul 31, 2026Updated 2 weeks ago
- SystemVerilog FSM generator☆39May 10, 2026Updated 3 months ago
- Programming language for the Programmable Realtime Unit Subsystem found on TI ARM processors. (BeagleBone black)☆25Nov 7, 2013Updated 12 years ago
- Xilinx ZynqMP AXI-ACP Adapter☆21May 18, 2026Updated 2 months ago