gthparch / edgeBench
Benchmarks for Characterizing the Deployment of Deep Neural Networks on Commercial Edge Devices - IISWC'19 Paper
☆15Updated 5 years ago
Related projects ⓘ
Alternatives and complementary repositories for edgeBench
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆44Updated 2 years ago
- research, experimentation and implementation of hardware-agnostic accelerated DL framework☆33Updated last week
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆49Updated 5 years ago
- ☆15Updated 3 years ago
- Stencil with Optimized Dataflow Architecture Compiler☆16Updated 4 years ago
- EQueue Dialect☆39Updated 2 years ago
- ☆14Updated 2 years ago
- MAERI public release☆31Updated 3 years ago
- This repo is to collect the state-of-the-art GNN hardware acceleration paper☆54Updated 3 years ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆47Updated 5 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆59Updated 3 years ago
- ☆22Updated 5 years ago
- Benchmarks of Deep Neural Networks☆35Updated 3 years ago
- Docker container with tools for the Timeloop/Accelergy tutorial☆23Updated 6 months ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆46Updated this week
- ☆25Updated 3 years ago
- Heterogenous ML accelerator☆16Updated last month
- Modified version of PyTorch able to work with changes to GPGPU-Sim☆45Updated last year
- ☆31Updated 3 years ago
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆46Updated 2 years ago
- ☆26Updated 4 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆115Updated 4 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆98Updated last year
- A reference implementation of the Mind Mappings Framework.☆28Updated 2 years ago
- CGRA Compilation Framework☆81Updated last year
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆28Updated last year
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆63Updated 5 years ago
- agile hardware-software co-design☆45Updated 2 years ago
- MAESTRO binary release☆22Updated 4 years ago