grayresearch / s3ga
S3GA: a simple scalable serial FPGA
☆10Updated last year
Related projects ⓘ
Alternatives and complementary repositories for s3ga
- Using VexRiscv without installing Scala☆36Updated 3 years ago
- Reusable Verilog 2005 components for FPGA designs☆36Updated last year
- A reconfigurable logic circuit made of identical rotatable tiles.☆20Updated 3 years ago
- FPGA based microcomputer sandbox for software and RTL experimentation☆45Updated this week
- RISC-V Processor written in Amaranth HDL☆33Updated 2 years ago
- PicoRV☆43Updated 4 years ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- Use ECP5 JTAG port to interact with user design☆24Updated 3 years ago
- Small footprint and configurable Inter-Chip communication cores☆54Updated last month
- Another size-optimized RISC-V CPU for your consideration.☆47Updated this week
- Basic USB 1.1 Host Controller for small FPGAs☆85Updated 4 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆36Updated 6 months ago
- IRSIM switch-level simulator for digital circuits☆30Updated 6 months ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆39Updated 3 years ago
- SoftCPU/SoC engine-V☆54Updated last year
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆29Updated 2 years ago
- A padring generator for ASICs☆22Updated last year
- Experiments with Yosys cxxrtl backend☆47Updated 11 months ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆42Updated this week
- USB virtual model in C++ for Verilog☆28Updated last month
- SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.☆29Updated 4 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆59Updated 5 years ago
- A design for TinyTapeout☆15Updated 2 years ago
- KiCad symbol library for sky130 and gf180mcu PDKs☆30Updated 9 months ago
- u[Dark]RISC -- "micro-darkrisc" -- an early 16-bit micro-RISC processor defined before DarkRISCV☆13Updated last year
- Open source Logic Analyzer based on LiteX SoC☆24Updated 2 months ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆82Updated 6 years ago
- IceCore Ice40 HX based modular core☆44Updated 3 years ago
- Tiny tips for Colorlight i5 FPGA board☆55Updated 3 years ago