nickg / nvcLinks
VHDL compiler and simulator
☆756Updated this week
Alternatives and similar repositories for nvc
Users that are interested in nvc are comparing it to the libraries listed below
Sorting:
- VUnit is a unit testing framework for VHDL/SystemVerilog☆801Updated 2 weeks ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,367Updated last week
- The PoC Library has been forked to github.com/VHDL/PoC. See new address below☆599Updated 4 months ago
- VHDL synthesis (based on ghdl)☆353Updated last month
- UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …☆414Updated last week
- nextpnr portable FPGA place and route tool☆1,561Updated this week
- Documenting the Xilinx 7-series bit-stream format.☆839Updated 6 months ago
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆677Updated 4 months ago
- A Python toolbox for building complex digital hardware☆1,314Updated 2 months ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,107Updated 2 months ago
- OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...☆252Updated 2 weeks ago
- An abstraction library for interfacing EDA tools☆724Updated 2 weeks ago
- SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows☆480Updated last week
- mor1kx - an OpenRISC 1000 processor IP core☆566Updated 3 months ago
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆683Updated this week
- GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard …☆866Updated last week
- A simple RISC-V processor for use in FPGA designs.☆282Updated last year
- SystemVerilog to Verilog conversion☆677Updated last week
- Multi-platform nightly builds of open source digital design and verification tools☆1,250Updated last week
- SystemVerilog compiler and language services☆886Updated last week
- Documenting the Lattice ECP5 bit-stream format.☆433Updated last month
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compil…☆427Updated 2 months ago
- A small, light weight, RISC CPU soft core☆1,483Updated 3 months ago
- draws an SVG schematic from a JSON netlist☆746Updated last year
- FOSS Flow For FPGA☆413Updated 11 months ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆297Updated this week
- Verilog to Routing -- Open Source CAD Flow for FPGA Research☆1,174Updated this week
- RISC-V Formal Verification Framework☆617Updated 3 years ago
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆679Updated 3 years ago
- A list of resources related to the open-source FPGA projects☆433Updated 3 years ago