Alternatives and similar repositories for parallella-hw:

Users that are interested in parallella-hw are comparing it to the libraries listed below

• parallella / parallella-examples
  Community created parallella projects
  ☆392Updated 5 years ago
• parallella / parallella-linux
  Linux Kernel forked from ADI (with latest ADI HDMI drivers)
  ☆67Updated 5 years ago
• parallella / parabuntu
  Official Ubuntu distro for Parallella
  ☆123Updated 4 years ago
• adapteva / epiphany-examples
  Simple examples showing how to program the Epiphany
  ☆84Updated 5 years ago
• parallella / parallella-utils
  Library of various community contributed Parallella board admin scripts and programs
  ☆38Updated 8 years ago
• Wolfgang-Spraul / fpgatools
  public domain tools for FPGAs
  ☆326Updated 8 years ago
• asicguy / gplgpu
  GPL v3 2D/3D graphics engine in verilog
  ☆664Updated 10 years ago
• greatscottgadgets / daisho
  SuperSpeed USB 3.0 FPGA platform
  ☆256Updated 9 years ago
• adapteva / epiphany-sdk
  Epiphany SDK build scripts (start here!)
  ☆124Updated 5 years ago
• YosysHQ / arachne-pnr
  Place and route tool for FPGAs
  ☆419Updated 5 years ago
• ATaylorCEngFIET / MicroZed-Chronicles
  Source code from the MicroZed Chronicles blog hosted by Xcell Daily Blog
  ☆190Updated 6 years ago
• FPGAwars / FPGA-peripherals
  Collection of open-source peripherals in Verilog
  ☆172Updated 2 years ago
• openrisc / orpsoc-cores
  Core description files for FuseSoC
  ☆124Updated 4 years ago
• jamieiles / oldland-cpu
  Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools
  ☆123Updated 9 years ago
• m-labs / misoc
  The original high performance and small footprint system-on-chip based on Migen™
  ☆321Updated last week
• eliaskousk / parallella-riscv
  RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
  ☆100Updated 6 years ago
• grahamedgecombe / icicle
  32-bit RISC-V system on chip for iCE40 FPGAs
  ☆304Updated last year
• lowRISC / lowrisc-chip
  The root repo for lowRISC project and FPGA demos.
  ☆595Updated last year
• Kirill888 / parallella-fpga-dummy-io
  Sample minimal Vivado project for Parallella FPGA
  ☆42Updated 8 years ago
• openrisc / mor1kx
  mor1kx - an OpenRISC 1000 processor IP core
  ☆520Updated 5 months ago
• dawsonjon / Chips-2.0
  FPGA Design Suite based on C to Verilog design flow.
  ☆242Updated 5 years ago
• parallella / parallella-uboot
  Official U-Boot package for Parallella
  ☆41Updated 9 years ago
• f32c / f32c
  A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz
  ☆413Updated this week
• riscvarchive / riscv-wiki
  ☆250Updated 8 years ago
• hamsternz / IntroToSpartanFPGABook
  A book on using the Spartan 3E FPGA with VHDL, using the Papilio One or Digilent Basys2 boards
  ☆270Updated 10 years ago
• parallella / parallella-fpga
  FPGA Development for the parallella
  ☆19Updated 7 years ago
• inforichland / freezing-spice
  A pipelined RISCV implementation in VHDL
  ☆95Updated 6 years ago
• benreynwar / pyvivado
  Python tools for Vivado Projects
  ☆73Updated 5 years ago
• steveicarus / ivtest
  Regression test suite for Icarus Verilog. (OBSOLETE)
  ☆116Updated 2 years ago
• westerndigitalcorporation / swerv-ISS
  Western Digital’s Open Source RISC-V SweRV Instruction Set Simulator
  ☆202Updated 4 years ago