Alternatives and similar repositories for FPGA-peripherals:

Users that are interested in FPGA-peripherals are comparing it to the libraries listed below

• ZipCPU / openarty
  An Open Source configuration of the Arty platform
  ☆130Updated last year
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆230Updated 2 years ago
• hdl4fpga / hdl4fpga
  VHDL library 4 FPGAs
  ☆177Updated this week
• Obijuan / RISC-V-FPGA
  RISC-V CPU for OpenFPGAs, in Icestudio
  ☆91Updated 11 months ago
• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆81Updated last year
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆178Updated 4 months ago
• enjoy-digital / usb3_pipe
  USB3 PIPE interface for Xilinx 7-Series
  ☆212Updated 3 years ago
• ZipCPU / wbuart32
  A simple, basic, formally verified UART controller
  ☆299Updated last year
• cliffordwolf / PonyLink
  A single-wire bi-directional chip-to-chip interface for FPGAs
  ☆121Updated 8 years ago
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆134Updated last month
• AleksandarKostovic / Riscy-SoC
  Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog
  ☆81Updated 5 years ago
• davidthings / tinyfpga_bx_usbserial
  USB Serial on the TinyFPGA BX
  ☆136Updated 3 years ago
• mcmayer / iCE40
  Lattice iCE40 FPGA experiments - Work in progress
  ☆105Updated 3 years ago
• yol / ethernet_mac
  Tri-mode (10/100/1000) full-duplex FPGA ethernet MAC in VHDL
  ☆162Updated last year
• onchipuis / mriscv
  A 32-bit Microcontroller featuring a RISC-V core
  ☆151Updated 7 years ago
• mczerski / SD-card-controller
  WISHBONE SD Card Controller IP Core
  ☆122Updated 2 years ago
• derekmulcahy / xvcpi
  Xilinx Virtual Cable Server for Raspberry Pi
  ☆113Updated 3 years ago
• timvideos / litex-buildenv
  An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!
  ☆217Updated 2 years ago
• ATaylorCEngFIET / MicroZed-Chronicles
  Source code from the MicroZed Chronicles blog hosted by Xcell Daily Blog
  ☆191Updated 6 years ago
• hamsternz / DisplayPort_Verilog
  A Verilog implementation of DisplayPort protocol for FPGAs
  ☆247Updated 6 years ago
• SpinalHDL / SaxonSoc
  SoC based on VexRiscv and ICE40 UP5K
  ☆157Updated last month
• skordal / potato
  A simple RISC-V processor for use in FPGA designs.
  ☆271Updated 8 months ago
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆133Updated 2 years ago
• alexforencich / verilog-wishbone
  Verilog wishbone components
  ☆114Updated last year
• xesscorp / VHDL_Lib
  Library of VHDL components that are useful in larger designs.
  ☆235Updated last year
• enjoy-digital / liteeth
  Small footprint and configurable Ethernet core
  ☆236Updated 2 weeks ago
• Avnet / hdl
  ☆111Updated last month
• analogdevicesinc / fpgahdl_xilinx
  (RETIRED see https://github.com/analogdevicesinc/hdl instead) FPGA interface reference designs for Analog Devices mixed signal IC product…
  ☆88Updated 6 years ago
• f4pga / f4pga-arch-defs
  FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
  ☆282Updated this week
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆80Updated 4 years ago