Alternatives and similar repositories for sgmii:

Users that are interested in sgmii are comparing it to the libraries listed below

• freecores / axi_master
  Generic AXI master stub
  ☆19Updated 10 years ago
• freecores / ddr3_sdram
  DDR3 SDRAM controller
  ☆18Updated 10 years ago
• dineshannayya / yifive_r0
  A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program
  ☆20Updated 2 years ago
• freecores / pipelined_fft_64
  Pipelined FFT/IFFT 64 points processor
  ☆12Updated 10 years ago
• CESNET / ofm
  Open FPGA Modules
  ☆23Updated 6 months ago
• amiq-consulting / physical_coding_library
  ☆18Updated 8 years ago
• freecores / reed_solomon_decoder
  Reed Solomon Decoder (204,188)
  ☆12Updated 10 years ago
• Cognoscan / AxiCores
  AXI4-Compatible Verilog Cores, along with some helper modules.
  ☆16Updated 5 years ago
• RoaLogic / Hamming-ECC
  Hamming ECC Encoder and Decoder to protect memories
  ☆32Updated 2 months ago
• freecores / wb_dma
  WISHBONE DMA/Bridge IP Core
  ☆18Updated 10 years ago
• pulp-platform / axi2apb
  ☆20Updated 5 years ago
• muzafferkal / axi-bfm
  AXI3 Bus Functional Models (Initiator & Target)
  ☆28Updated 2 years ago
• PyHDI / ipgen
  IP-core package generator for AXI4/Avalon
  ☆22Updated 6 years ago
• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆29Updated 8 years ago
• alexforencich / cocotbext-uart
  UART models for cocotb
  ☆27Updated 2 years ago
• ShonTaware / LowPower
  Various low power labs using sky130
  ☆12Updated 3 years ago
• olofk / fusesocotb
  Quick'n'dirty FuseSoC+cocotb example
  ☆18Updated 4 months ago
• rggen / rggen-sv-rtl
  Common SystemVerilog RTL modules for RgGen
  ☆12Updated 2 months ago
• ben-marshall / croyde-riscv
  A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.
  ☆44Updated 3 years ago
• RoaLogic / plic
  Platform Level Interrupt Controller
  ☆40Updated 11 months ago
• shalan / Chameleon_SoC
  AHB-Lite based SoC for IBEX/SWERV/VEXRISC/...
  ☆13Updated 3 weeks ago
• RoaLogic / ahb3lite_pkg
  Common SystemVerilog package used by all RoaLogic IP with AMBA AHB3-Lite interfaces
  ☆17Updated 11 months ago
• pulp-platform / jtag_dpi
  JTAG DPI module for SystemVerilog RTL simulations
  ☆27Updated 9 years ago
• pradeepsk13 / vsdsram_sky130_1.8V
  Design of 4KB Static RAM 1.8V (access time <2.5ns) using OpenRAM and Sky130 node
  ☆14Updated 4 years ago
• freecores / mac_layer_switch
  100 MB/s Ethernet MAC Layer Switch
  ☆14Updated 10 years ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆35Updated 2 years ago
• Elphel / eddr3
  mirror of https://git.elphel.com/Elphel/eddr3
  ☆40Updated 7 years ago
• hellgate202 / crc_calc
  Simple and effective parallel CRC calculator written in synthesizable SystemVerilog
  ☆13Updated 6 years ago
• verilator / example-systemverilog
  ☆38Updated last year
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆42Updated 4 years ago