Alternatives and similar repositories for lfsr-vhdl

Users that are interested in lfsr-vhdl are comparing it to the libraries listed below

• howerj / bit-serial
  A bit-serial CPU written in VHDL, with a simulator written in C.
  ☆127Updated 10 months ago
• turbo9team / turbo9
  Turbo9 - Pipelined 6809 Microprocessor IP
  ☆159Updated 9 months ago
• Pconst167 / sol-1
  Sol-1: A CPU/Computer System made from 74 series logic.
  ☆75Updated this week
• krakenlake / vmon
  Tiny RISC-V machine code monitor written in RISC-V assembly.
  ☆46Updated this week
• aw / fiveforths
  32-bit RISC-V Forth for microcontrollers
  ☆77Updated 4 months ago
• AndresNavarro82 / vt52-fpga
  ☆96Updated 4 years ago
• mnemocron / my-discrete-fpga
  My own FPGA architecture simulated in VHDL, realized with 7400-logic on PCB.
  ☆43Updated last year
• brouhaha / glacial
  Glacial - microcoded RISC-V core designed for low FPGA resource utilization
  ☆86Updated 5 years ago
• Forty-Bot / ethernet
  WIP 100BASE-TX PHY
  ☆76Updated 7 months ago
• TinyTapeout / vga-playground
  Playground for VGA projects on Tiny Tapeout
  ☆63Updated 4 months ago
• hutch31 / tv80
  TV80 Z80-compatible microprocessor
  ☆52Updated 5 years ago
• theandrew168 / bronzebeard
  Minimal assembler and ecosystem for bare-metal RISC-V development
  ☆53Updated last year
• Ravenslofty / 74xx-liberty
  ☆68Updated 2 years ago
• mikeakohn / w65c832
  W65C832 (32 bit 6502) in an FPGA.
  ☆23Updated last week
• jamesbowman / j1
  The J1 CPU
  ☆169Updated 4 years ago
• MorrisMA / MAM65C02-Processor-Core
  Microprogrammed 65C02-compatible FPGA Processor Core (Verilog-2001)
  ☆55Updated 8 years ago
• tomverbeure / panologic
  PanoLogic Zero Client G1 reverse engineering info
  ☆75Updated last year
• cr1901 / sentinel
  Another size-optimized RISC-V CPU for your consideration.
  ☆58Updated this week
• cpldcpu / MCPU
  MCPU - A Minimal 8Bit CPU in a 32 Macrocell CPLD
  ☆227Updated 4 months ago
• scotws / 265SXB-Guide
  A Most Very Unofficial Guide to the W65C265SXB
  ☆50Updated 11 months ago
• tomverbeure / panologic-g2
  Pano Logic G2 Reverse Engineering Project
  ☆143Updated 4 years ago
• microCore-VHDL / microCore
  Hardware/Software Co-design environment of a processor core for deterministic real time systems
  ☆38Updated last year
• whitequark / prjbureau
  Documenting the Microchip (Atmel) ATF15xx CPLD fuse maps and programming algorithms
  ☆59Updated last month
• sellicott / tcc-riscv32
  Port TCC (Tiny C Compiler) to support Risc-V 32 targets (specifically for the ESP32-C3). This project is a work-in-progress and is not cu…
  ☆69Updated last week
• j-core / jcore-cpu
  J-Core J2/J32 5 stage pipeline CPU core
  ☆53Updated 4 years ago
• theandrew168 / derzforth
  Bare-metal Forth implementation for RISC-V
  ☆54Updated last year
• cpldcpu / PCBFlow
  VHDL to Discrete Logic on PCB Flow
  ☆122Updated 6 months ago
• lawrie / fpga_pio
  An attempt to recreate the RP2040 PIO in an FPGA
  ☆301Updated last year
• SubProto / icestick-vga-test
  Test of ICEstick PLL usage with Yosys/Arachne-PNR/Icetools
  ☆21Updated 8 years ago
• suarezvictor / litex_imgui_usb_demo
  Soft USB for LiteX
  ☆50Updated 2 years ago