An implementation of a CPU that uses a Linear Feedback Shift Register as a Program Counter instead of a normal one
☆55Apr 11, 2026Updated 5 months ago
Alternatives and similar repositories for lfsr-vhdl
Users that are interested in lfsr-vhdl are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A VM that uses LFSR instead of a normal program counter that runs Forth☆17Apr 14, 2026Updated 5 months ago
- A bit-serial CPU written in VHDL, with a simulator written in C.☆143Sep 1, 2024Updated 2 years ago
- A Forth environment on a single-Instruction 16-bit SUBLEQ machine☆17Jul 31, 2026Updated last month
- "Talking PD" article code repository☆14Jun 23, 2023Updated 3 years ago
- Text-mode graphics card, using only TTL gates.☆59Nov 8, 2020Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A feature-complete gate-level microcoded Intel 4004 in 4004 bytes of C, capable of emulating the original Busicom calculator ROM for whic…☆29Aug 5, 2025Updated last year
- Digital Signal Processing and Well-Known Modulations on HDL☆40May 22, 2025Updated last year
- Idris was an operating system developed by Whitesmiths☆33Nov 20, 2021Updated 4 years ago
- SIOF (Scheme In One File) is a minimal interpreter for R7RS Scheme☆77May 5, 2022Updated 4 years ago
- Cloneless1 is an open-source tamper-resistant cryptographic ASIC design☆27Jul 30, 2026Updated last month
- ☆17Apr 21, 2023Updated 3 years ago
- Proof of Concept to learn Amaranth as an entry effort for Supercon's RTL design competition☆10Nov 11, 2022Updated 3 years ago
- Minimal set of files required to build the WSPR decoder by Joe Taylor, K1JT and Steve Franke, K9AN.☆14Jul 24, 2025Updated last year
- 16-bit SUBLEQ CPU running eForth - just for fun☆82Aug 31, 2026Updated 3 weeks ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆20Aug 25, 2026Updated 3 weeks ago
- buildroot fork from damien -- RV32 no MMU Linux. Run "make qemu_riscv32_nommu_virt_minimal_defconfig" then "make"☆27Apr 23, 2024Updated 2 years ago
- 360nosc0pe Siglent SDS 1x0xX-E FPGA bitstreams☆17Aug 13, 2018Updated 8 years ago
- My second attempt at a RISC-V CPU with learnings form my previous attempt.☆11Apr 27, 2026Updated 4 months ago
- A Risc-V SoC for Tiny Tapeout☆60Jul 12, 2026Updated 2 months ago
- Library with VHDL cores implementing Advanced Microcontroller Bus Architecture 5 (AMBA5) specifications such as APB, AHB, AXI, and AXI-St…☆18Sep 6, 2026Updated 2 weeks ago
- Riegel Computer☆17Jun 30, 2023Updated 3 years ago
- RISC-V Playground on Nandland Go☆16Mar 2, 2023Updated 3 years ago
- ☆66May 7, 2021Updated 5 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Source to the 3DO game Icebreaker 2☆14Jan 18, 2023Updated 3 years ago
- 2-core MIPS R10K OoO Processor with Snooping MSI and Pipeline Bus☆14Jan 5, 2018Updated 8 years ago
- My KiCAD libraries☆22Sep 3, 2026Updated 2 weeks ago
- Implementation of a RISC-V CPU in Verilog.☆19Jun 27, 2026Updated 2 months ago
- Turbo9 - Pipelined 6809 Microprocessor IP☆169Sep 1, 2026Updated 3 weeks ago
- ☆21Updated this week
- Another World on a chip☆293Oct 6, 2023Updated 2 years ago
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 features☆32Jan 30, 2025Updated last year
- Basic OpenGL 1.x implementation for small FPGAs (like iCE40UP5K)☆45Nov 14, 2021Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Tiny Tapeout GDS Action (using LibreLane)☆29Updated this week
- Verilog implementation of Bresenham's line drawing algorithm.☆14May 11, 2026Updated 4 months ago
- MOVED to code.netzhansa.com/hanshuebner/cadr2. This GitHub mirror is archived.☆17May 23, 2014Updated 12 years ago
- mini C compiler for esp32 / Xtensa☆248Jun 27, 2026Updated 2 months ago
- This repository contains files relating to my subleq processor build.☆27Mar 29, 2026Updated 5 months ago
- Tutorial, examples and regression tests for Coriolis & Alliance (LIP6)☆17Aug 28, 2026Updated 3 weeks ago
- A collection of impls to get the current moon phase☆83Jul 5, 2026Updated 2 months ago