Alternatives and similar repositories for libposit:

Users that are interested in libposit are comparing it to the libraries listed below

• thoughtworks / hardposit-chisel3
  Chisel library for Unum Type-III Posit Arithmetic
  ☆37Updated 3 weeks ago
• cliffordwolf / bextdep
  Reference Hardware Implementations of Bit Extract/Deposit Instructions
  ☆24Updated 7 years ago
• SiliconSemantics / firrtlator
  firrtlator is a FIRRTL C++ library
  ☆21Updated 8 years ago
• fpgasystems / fpga-hyperloglog
  FPGA-based HyperLogLog Accelerator
  ☆12Updated 4 years ago
• SamuelBayliss / Potholes
  Polyhedral Compilation tool for High Level Synthesis.
  ☆10Updated 10 years ago
• artecs-group / PERCIVAL
  Open-Source Posit RISC-V Core with Quire Capability
  ☆56Updated 2 months ago
• spcl / apfp
  FPGA acceleration of arbitrary precision floating point computations.
  ☆38Updated 2 years ago
• zhemao / chisel-float
  Floating point modules for CHISEL
  ☆32Updated 10 years ago
• IntelLabs / t2sp
  Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)
  ☆31Updated 11 months ago
• vegaluisjose / vast
  Verilog AST
  ☆21Updated last year
• tvanas / r-vex
  A reconfigurable and extensible VLIW processor implemented in VHDL
  ☆32Updated 10 years ago
• sifiveinc / wake
  The SiFive wake build tool
  ☆89Updated this week
• iree-org / iree-bare-metal-arm
  Example for running IREE in a bare-metal Arm environment.
  ☆33Updated last month
• maerhart / llhd
  A low-level intermediate representation for hardware description languages
  ☆28Updated 4 years ago
• jameshegarty / rigel
  Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FP…
  ☆56Updated 4 years ago
• chipsalliance / firrtl-spec
  The specification for the FIRRTL language
  ☆54Updated this week
• cucapra / latte21
  Languages, Tools, and Techniques for Accelerator Design
  ☆33Updated 3 years ago
• P3109 / Public
  materials available to the public
  ☆24Updated 5 months ago
• manish-kj / PACoGen
  PACoGen: Posit Arithmetic Core Generator
  ☆69Updated 5 years ago
• eruffaldi / cppPosit
  c++ posit implementation
  ☆44Updated last year
• rsnikhil / RISCV_ISA_Spec_Tour
  Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)
  ☆36Updated 4 years ago
• Mogball / declarative-mlir-compiler
  Declarative MLIR compilers in Python!
  ☆33Updated 4 years ago
• Etaphase / FastSigmoids.jl
  Sigmoid Numbers backed by IEEE Floats
  ☆17Updated 7 years ago
• tobiasgrosser / islplot
  Library to plot integer sets and maps
  ☆49Updated 8 years ago
• oprecomp / flexfloat
  C library for the emulation of reduced-precision floating point types
  ☆48Updated 2 years ago
• microsoft / Elastic-Silicon-Interconnect
  ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…
  ☆34Updated 4 years ago
• makslevental / mmlir
  A minimal (really) out-of-tree MLIR example
  ☆44Updated last week
• StanfordAHA / lassen
  The PE for the second generation CGRA (garnet).
  ☆17Updated this week
• msoeken / kitty
  C++ truth table library
  ☆53Updated last year
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆40Updated last week