Alternatives and similar repositories for Public

Users that are interested in Public are comparing it to the libraries listed below

• llvm / mlir-www
  ☆83Updated this week
• makslevental / mmlir
  A minimal (really) out-of-tree MLIR example
  ☆44Updated last month
• FPBench / FPBench
  A standard for floating point accuracy benchmarks
  ☆52Updated 6 months ago
• Mogball / declarative-mlir-compiler
  Declarative MLIR compilers in Python!
  ☆35Updated 4 years ago
• sifiveinc / wake
  The SiFive wake build tool
  ☆91Updated this week
• llvm / eudsl
  Embedded Universal DSL: a good DSL for us, by us
  ☆45Updated this week
• mwillsey / cs265
  Website for CS 265
  ☆29Updated 8 months ago
• sdiehl / mlir-egglog
  A toy compiler for NumPy array expressions that uses e-graphs and MLIR
  ☆107Updated last month
• riscv / riscv-j-extension
  Working Draft of the RISC-V J Extension Specification
  ☆191Updated 3 weeks ago
• ucb-bar / berkeley-testfloat-3
  TestFloat release 3
  ☆68Updated 6 months ago
• wpmed92 / shaderpulse
  🚧 A work-in-progress GLSL compiler targeting SPIR-V mlir 🚧
  ☆20Updated 11 months ago
• tobiasgrosser / islplot
  Library to plot integer sets and maps
  ☆53Updated 8 years ago
• dzaima / intrinsics-viewer
  x86-64, ARM, and RVV intrinsics viewer
  ☆56Updated 5 months ago
• gussmith23 / glenside
  A pure, low-level tensor program representation enabling tensor program optimization via program rewriting. See the web demo at https://g…
  ☆70Updated 3 months ago
• brucehoult / rvv_example
  Simple demonstration of using the RISC-V Vector extension
  ☆47Updated last year
• MPACT-ORG / mpact-compiler
  Retargetable ML compilers for the twenty-first century!
  ☆13Updated 5 months ago
• periscop / cloog
  The CLooG Code Generator in the Polyhedral Model
  ☆51Updated 2 years ago
• Meinersbur / isl
  Integer Set Library (source repository: http://repo.or.cz/w/isl.git)
  ☆73Updated 7 months ago
• artecs-group / PERCIVAL
  Open-Source Posit RISC-V Core with Quire Capability
  ☆66Updated 7 months ago
• iree-org / iree-bare-metal-arm
  Example for running IREE in a bare-metal Arm environment.
  ☆40Updated last month
• cucapra / dahlia
  Time-sensitive affine types for predictable hardware generation
  ☆145Updated last week
• camel-cdr / rvv-bench-results
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code. (Results)
  ☆34Updated last week
• pydrofoil / pydrofoil
  A fast RISC-V emulator based on the RISC-V Sail model, and an experimental ARM one
  ☆79Updated last week
• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆127Updated last week
• riscvarchive / riscv-code-size-reduction
  ☆147Updated last year
• rsnikhil / RISCV_ISA_Spec_Tour
  Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)
  ☆37Updated 4 years ago
• gussmith23 / lakeroad
  FPGA synthesis tool powered by program synthesis
  ☆52Updated 2 months ago
• t-crest / patmos
  Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project
  ☆145Updated last month
• openhwgroup / corev-llvm-project
  ☆17Updated last year
• cucapra / turnt
  simple snapshot-style integration testing for commands
  ☆71Updated 3 months ago