SystemVerilog language-oriented exercises
☆59Apr 2, 2026Updated last month
Alternatives and similar repositories for systemverilog-homework
Users that are interested in systemverilog-homework are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- FPGA exercise for beginners☆45Oct 13, 2025Updated 6 months ago
- Репозиторий заданий и примеров направления функциональной верификации Школы синтеза цифровых схем☆22Mar 7, 2026Updated last month
- Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)☆64Sep 15, 2023Updated 2 years ago
- Методические материалы к лабораторным работам дисциплины "Проектирование цифровых устройств на языке Verilog"☆12Sep 4, 2023Updated 2 years ago
- Методические материалы по разработке процессора архитектуры RISC-V☆330Apr 25, 2026Updated last week
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Учебные материалы Альянса RISC-V☆16Jun 30, 2025Updated 10 months ago
- Открытый ознакомительный курс "Введение в функциональную верификацию RISC-V ядер"☆50Nov 7, 2025Updated 5 months ago
- FPGA exercise for beginners☆166Updated this week
- Открытое RISC-V процессорное ядро MIRISCV для образовательных целей☆30Dec 5, 2024Updated last year
- Verilog implementation of RISC-V: RV32IAC plus much of B. 32-bit or 16-bit bus.☆27Jul 31, 2023Updated 2 years ago
- DigitalDesignSchool2022/23 repository☆21Dec 2, 2022Updated 3 years ago
- list of links to resources related to functional verification☆12Sep 10, 2023Updated 2 years ago
- ☆46Apr 1, 2026Updated last month
- human-in-the-loop HDL training tool☆44Feb 27, 2024Updated 2 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Материалы по курсу Углубленное изучение языка С (факультатив) для студентов МИЭТ☆12Feb 4, 2025Updated last year
- CPU microarchitecture, step by step☆191Jun 26, 2022Updated 3 years ago
- Методические материалы курса "Практикум по ПЛИ С"☆46Apr 10, 2026Updated 3 weeks ago
- SystemVerilog language-oriented exercises☆156Apr 2, 2026Updated last month
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆979Nov 15, 2024Updated last year
- VCD file viewer for Neovim☆15Feb 20, 2022Updated 4 years ago
- A tool to run litmus tests on bare-metal hardware☆13Mar 13, 2017Updated 9 years ago
- ☆49Nov 9, 2021Updated 4 years ago
- Classic Blink test for MIK32 AMUR by AO Mikron. Uses Makefile instead of VSCode.☆16May 1, 2025Updated last year
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Design and implementation of a reconfigurable FIR filter in FPGA☆15Sep 26, 2022Updated 3 years ago
- This project aims to explore and compare different Kalman filter architectures and their performance on FPGA platforms. The focus is on t…☆29Dec 9, 2025Updated 4 months ago
- ☆11Jul 12, 2023Updated 2 years ago
- Laboratory workshop for ALINX AX309 development board (with FPGA Spartan 6)☆15Mar 23, 2025Updated last year
- Verilog Model for W25Q128JVxIM Serial Flash Memory☆18Jun 7, 2020Updated 5 years ago
- STM32 Lib LCD1602 LCD2004 LCD0802 I2C or 4BIT☆14Aug 7, 2021Updated 4 years ago
- Микропроцессорные устройства☆13Feb 19, 2026Updated 2 months ago
- Astra_S9_FPGA is a Powerful DevBoard from used Antminer S9 Control Board☆52Mar 7, 2026Updated last month
- BSc. Project (UoW) - simulation of GSM and EDGE network modulation schemes (GMSK and 8PSK)☆16Jan 7, 2020Updated 6 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Implementation of FM (frequency modulation) radio transmitter in FPGA Altera Cyclone III.☆14May 16, 2016Updated 9 years ago
- A PCB based business card using open hardware and free software☆12Sep 10, 2024Updated last year
- ☆18Feb 27, 2023Updated 3 years ago
- Reverse-engineering of SEGA chips☆62Nov 21, 2025Updated 5 months ago
- llvm-snippy instruction sequence generator☆85Updated this week
- A collection of resources for the EBAZ4205 FPGA board.☆19Jun 30, 2021Updated 4 years ago
- DiY☆29Jan 4, 2024Updated 2 years ago