human-in-the-loop HDL training tool
☆44Feb 27, 2024Updated 2 years ago
Alternatives and similar repositories for hdlgadgets
Users that are interested in hdlgadgets are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Репозиторий факультатива по функциональной верификации НИУ МИЭТ☆16Aug 24, 2024Updated last year
- Karnaugh Interactive Extendable ASIC Simulation Board AKA Karnix ASB-254☆19May 19, 2024Updated last year
- FPGA exercise for beginners☆159Mar 8, 2026Updated 2 weeks ago
- ☆48Nov 9, 2021Updated 4 years ago
- Открытое RISC-V процессорное ядро MIRISCV для образовательных целей☆26Dec 5, 2024Updated last year
- Revision Control Labs and Materials☆26Jan 23, 2018Updated 8 years ago
- Открытый ознакомительный курс "Введение в функциональную верификацию RISC-V ядер"☆47Nov 7, 2025Updated 4 months ago
- FPGA exercise for beginners☆44Oct 13, 2025Updated 5 months ago
- ☆11Jul 12, 2023Updated 2 years ago
- Project and presentation for SpaceX Application☆14Jul 21, 2017Updated 8 years ago
- Полезные ресурсы по тематике FPGA / ПЛИС☆178Oct 28, 2025Updated 4 months ago
- Методические материалы по разработке процессора архитектуры RISC-V☆313Mar 16, 2026Updated last week
- SystemVerilog language-oriented exercises☆57Updated this week
- ☆133Aug 14, 2025Updated 7 months ago
- Examples of common device drivers for different MCUs (STM8, STM32) with separate bare metal hardware abstraction layers.☆23Jan 13, 2021Updated 5 years ago
- IP-XACT XML binding library☆16Jun 23, 2016Updated 9 years ago
- ☆33Feb 20, 2026Updated last month
- Log file scanner used with EDA tools to classify errors and warnings☆12Nov 14, 2022Updated 3 years ago
- Implementation of a circular queue in hardware using verilog.☆17Mar 22, 2019Updated 7 years ago
- **SCAM ALERT !!!!!!! ALPHABAY VE DARK WEB TURKİSH DOLANDIRICIDIR BU KONUYU AÇANLARDA KENDİLERİDİR UZAK DURUN** **BÜYÜK BİR DOLANDIRICIL…☆10Jul 14, 2023Updated 2 years ago
- Audio filtering with pyfda and cocotb☆12Sep 24, 2020Updated 5 years ago
- Архитектуры процессорных систем (старый репозиторий, ранее размещавшийся по адресу github.com/MPSU/APS)☆98Jan 27, 2024Updated 2 years ago
- Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)☆27Jul 11, 2024Updated last year
- Example of Python and PyTest powered workflow for a HDL simulation☆15Jan 17, 2021Updated 5 years ago
- I2C communication for FTDI chips using free libftdi☆15Aug 2, 2016Updated 9 years ago
- Project: Precise Measure of time delays in FPGA☆31Aug 3, 2017Updated 8 years ago
- Repository for keeping code from YouTube Tutorials☆11Sep 27, 2022Updated 3 years ago
- Static Timing Analysis Full Course☆65Jan 14, 2023Updated 3 years ago
- Implements a simple UVM based testbench for a simple memory DUT.☆13Oct 26, 2019Updated 6 years ago
- ☆10Jun 11, 2018Updated 7 years ago
- KiCad symbols and footprints created by myself or modified from KiCad library for my projects.☆15Nov 16, 2025Updated 4 months ago
- SystemVerilog DPI "TCP/IP Shunt" (System Verilog/SystemC/Python TCP/IP socket library)☆54Jan 31, 2026Updated last month
- Bluespec H.264 Decoder☆12Jul 17, 2014Updated 11 years ago
- Examples for Gowin Tang Nano 4k FPGA-board.☆13Aug 13, 2022Updated 3 years ago
- ☆10Nov 8, 2019Updated 6 years ago
- Hardware generation library based on "Kernel IP" (KIP) cores: programmable execution kernels inferred from microarchitectural templates☆32Oct 22, 2025Updated 5 months ago
- Naive Educational RISC V processor☆94Oct 12, 2025Updated 5 months ago
- Educational verilog library that supports IEEE754 floating point arithmetic with a parametrizable mantissa and exponent☆32Mar 13, 2025Updated last year
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆17Sep 2, 2023Updated 2 years ago