Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)
☆63Sep 15, 2023Updated 2 years ago
Alternatives and similar repositories for DDLM
Users that are interested in DDLM are comparing it to the libraries listed below
Sorting:
- ChipEXPO 2020 Digital Design School Labs☆37Nov 11, 2022Updated 3 years ago
- SystemVerilog language-oriented exercises☆57Feb 17, 2026Updated 2 weeks ago
- FPGA exercise for beginners☆43Oct 13, 2025Updated 4 months ago
- Репозиторий заданий и примеров направления функциональной верификации Школы синтеза цифровых схем☆22Updated this week
- DigitalDesignSchool2022/23 repository☆21Dec 2, 2022Updated 3 years ago
- Репозиторий факультатива по функциональной верификации НИУ МИЭТ☆16Aug 24, 2024Updated last year
- CPU microarchitecture, step by step☆187Jun 26, 2022Updated 3 years ago
- CPU microarchitecture, step by step☆207Nov 1, 2020Updated 5 years ago
- Digital Design Express Course☆19Apr 11, 2019Updated 6 years ago
- SystemVerilog language-oriented exercises☆143Feb 17, 2026Updated 2 weeks ago
- Методические мат ериалы по разработке процессора архитектуры RISC-V☆309Updated this week
- Открытый ознакомительный курс "Введение в функциональную верификацию RISC-V ядер"☆47Nov 7, 2025Updated 3 months ago
- Полезные ресурсы по тематике FPGA / ПЛИС☆177Oct 28, 2025Updated 4 months ago
- Архитектуры процессорных систем (старый репозиторий, ранее размещавшийся по адресу github.com/MPSU/APS)☆97Jan 27, 2024Updated 2 years ago
- Digital Design Labs☆25Dec 21, 2018Updated 7 years ago
- SDRAM controller for MIPSfpga+ system☆24Oct 30, 2020Updated 5 years ago
- Учебные материалы Альянса RISC-V☆16Jun 30, 2025Updated 8 months ago
- ☆11Jul 12, 2023Updated 2 years ago
- ☆12Feb 17, 2023Updated 3 years ago
- Методические материалы к лабораторным работам дисциплины "Проектирование цифровых устройств на языке Verilog"☆12Sep 4, 2023Updated 2 years ago
- ☆17Oct 6, 2023Updated 2 years ago
- Материалы для курсов по проектированию цифровых вычислительных систем☆100Updated this week
- It is an alternative implementation of the printf family suitable for embedded systems.☆19Apr 4, 2021Updated 4 years ago
- A basic verilog driver for the TM1638 LED and key matrix chip☆19Dec 22, 2017Updated 8 years ago
- ☆15Jan 9, 2022Updated 4 years ago
- Using JTAG on STM32F103C8T6 to get device ID(IDCODE) and utilize other JTAG instructions such as BYPASS, EXTEST, SAMPLE/PRELOAD. Tera Ter…☆43Jun 17, 2023Updated 2 years ago
- STM32 cryptographic firmware library software expansion for STM32Cube (UM1924)☆12Jan 20, 2020Updated 6 years ago
- ☆46Sep 30, 2025Updated 5 months ago
- Documentation for Chinese ALTERA Cyclone IV EP4CE6 FPGA Development Board☆146Nov 1, 2022Updated 3 years ago
- Elbrus 2000 (e2k) backend to LCC (Little C Compiler)☆22Sep 9, 2022Updated 3 years ago
- Implementation of ECC on FPGA-Zynq7000 SoC☆19Jul 12, 2019Updated 6 years ago
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆963Nov 15, 2024Updated last year
- High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model☆27Feb 2, 2026Updated last month
- ☆25May 20, 2020Updated 5 years ago
- Drawio => VHDL and Verilog☆61Oct 15, 2023Updated 2 years ago
- ☆23Mar 16, 2017Updated 8 years ago
- Private Mode eXecution for Windows on Python☆24Nov 8, 2020Updated 5 years ago
- Documentation for Chinese ALTERA Cyclone IV EP4CE6 FPGA Development Board☆32May 8, 2022Updated 3 years ago
- Collaborating on papers for the ISO C++ committee - public repo☆27Nov 21, 2025Updated 3 months ago