lijiaxun-sgms / w25q128jvxim_v_simView external linksLinks
Verilog Model for W25Q128JVxIM Serial Flash Memory
☆17Jun 7, 2020Updated 5 years ago
Alternatives and similar repositories for w25q128jvxim_v_sim
Users that are interested in w25q128jvxim_v_sim are comparing it to the libraries listed below
Sorting:
- Project 2.2 Frequency counter☆12May 30, 2025Updated 8 months ago
- Various projects of SPI loader module for xilinx fpga☆33Jul 20, 2020Updated 5 years ago
- MATLAB Project to Classify Different Sleep Stages of the EEG Signals using Machine Learning (Random Forest and Support Vector Machine)☆13Jan 18, 2025Updated last year
- Script AutoCad AutoLISP para la generación de ficheros Catastro GML INSPIRE de parcela catastral y de edificio. Etiquetas: gml, parcela c…☆16Feb 25, 2020Updated 5 years ago
- Processing the audio signal from a Handheld Doppler Ultrasound scan device to study the volumetric flow of blood by reading the spectral …☆11May 28, 2019Updated 6 years ago
- code and data for paper Joint Image and Depth Estimation with Mask-Based Lensless Cameras☆12Oct 4, 2020Updated 5 years ago
- Python tools for processing Verilog files☆10Dec 7, 2011Updated 14 years ago
- Solving physionet2017 with RCRNN☆10Jun 11, 2019Updated 6 years ago
- This place provide different SRAM cells netlist to be simulated with HSpice tool in sub-20nm FinFET technologies.☆12Dec 31, 2020Updated 5 years ago
- Deep learning extended depth-of-field microscope for fast and slide-free histology☆11Nov 22, 2021Updated 4 years ago
- NeoGeo FPGA☆10Jul 20, 2025Updated 6 months ago
- 位宽和深度可定制的异步FIFO☆13May 29, 2024Updated last year
- This projected explored the effect of introducing channel and spatial attention mechanisms, namely SEN-Net, ECA-Net, and CBAM to existin…☆11Jun 11, 2023Updated 2 years ago
- ☆33Jan 6, 2026Updated last month
- Simple projects with the CYC1000 FPGA board☆11Apr 21, 2020Updated 5 years ago
- [CVPR 2022] Code for the paper "Quantization-aware Deep Optics for Diffractive Snapshot Hyperspectral Imaging".☆16Oct 6, 2022Updated 3 years ago
- This is about the implementation of (2,1,4) Convolutional Encoder and Viterbi Decoder using Verilog VHDL.☆13Aug 12, 2020Updated 5 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆11Dec 14, 2022Updated 3 years ago
- A curated list of awesome Ethereum tutorials, articles, and resources.☆12Apr 10, 2018Updated 7 years ago
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI work…☆10Jan 13, 2022Updated 4 years ago
- Unofficial Reproduction: Capacity estimation of lithium-ion batteries based on adaptive empirical wavelet transform and long short-term m…☆12Oct 28, 2024Updated last year
- Experiments with Cologne Chip's GateMate FPGA architecture☆17Nov 16, 2023Updated 2 years ago
- Allows limited keyboard use on a locked desktop☆12Nov 30, 2021Updated 4 years ago
- Reproducing TinySleepNet for sleep stage prediction based on the signal channel EEG using PyTorch and implementing a new smaller and fast…☆10May 9, 2021Updated 4 years ago
- 基于注意力机 制的单通道EEG睡眠分期项目☆15Nov 24, 2022Updated 3 years ago
- Repositorio donde realizar las entregas del tutorial de Electrónica digital para makers con FPGAs libres☆62Nov 30, 2024Updated last year
- Quickly update a bitstream with new RAM contents☆16Jun 8, 2021Updated 4 years ago
- A verilog HDL based project to control a servomotor with voice commands from an android phone.☆12Nov 11, 2019Updated 6 years ago
- Implementation of Partially Parellel LDPC Code Decoder in Verilog☆15Jul 23, 2020Updated 5 years ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Jan 22, 2025Updated last year
- Hardware Implementation of Sigmoid Function using verilog HDL☆16Dec 16, 2019Updated 6 years ago
- (CVPR 2024)Official implementation of KDBTS: Boosting Self-Supervision for Single-View Scene Completion via Knowledge Distillation☆10Jan 20, 2026Updated 3 weeks ago
- Example of a full DC synthesis script for a simple design☆13Feb 25, 2019Updated 6 years ago
- NSCSCC “龙芯杯” 2024 个人赛 LoongArch 赛道三等奖☆14Aug 17, 2024Updated last year
- Tool to automate the setup and updates of a development environment for any project (Successor of devonfw-ide).☆33Jan 30, 2026Updated 2 weeks ago
- PCXT port for Xilinx Spartan 6 FPGAs by spark2k06☆13May 21, 2023Updated 2 years ago
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 5 years ago
- MiSTer arcade core for Tecmo arcade classics: Rygar (1986), Gemini Wing (1987), and Silkworm (1988).☆14Dec 9, 2025Updated 2 months ago
- ☆24Jan 12, 2016Updated 10 years ago