MPSU / FPGA_pract

Related projects ⓘ

Alternatives and complementary repositories for FPGA_pract

• miet-mpsu-dsp / labs
  Лабораторные работы по ЦОС (python)
  ☆8Updated 6 months ago
• MPSU / PCU-Verilog-labs
  Методические материалы к лабораторным работам дисциплины "Проектирование цифровых устройств на языке Verilog"
  ☆11Updated last year
• merldsu / SAP_FPU
  This repository contains the Simple As Possible Floating Point Unit design based on the IEEE-754 Standard.
  ☆18Updated last year
• iDoka / mastering-fpgasic-book
  Mastering FPGASIC Book
  ☆18Updated 2 years ago
• yuri-panchul / systemverilog-homework
  SystemVerilog language-oriented exercises
  ☆48Updated 3 weeks ago
• MIPSfpga / digital-design-lab-manual
  Digital Design Labs
  ☆23Updated 5 years ago
• nrot / WaveGen
  ☆11Updated last year
• iDoka / asic-pinout-drawer
  Simple pin assignment generator for IC case
  ☆16Updated 7 years ago
• PavlenkoG / ECP5_PCIE_Analyzer
  ☆14Updated last year
• ultraembedded / core_usb_bridge
  USB -> AXI Debug Bridge
  ☆35Updated 3 years ago
• IObundle / iob-lib
  Verilog Modules and Python Scripts for Creating IP Core Build Directories
  ☆29Updated last year
• yuri-panchul / basics-graphics-music
  FPGA exercise for beginners
  ☆90Updated this week
• ThalesGroup / TMR
  Triple Modular Redundancy
  ☆24Updated 5 years ago
• FPGA-Systems / fpga-awesome-list
  Полезные ресурсы по тематике FPGA / ПЛИС
  ☆156Updated last week
• semify-eda / waveform-generator
  Waveform Generator
  ☆11Updated 2 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆24Updated 3 years ago
• andrewattwood / fuserisc
  Dual RISC-V DISC with integrated eFPGA
  ☆15Updated 3 years ago
• ChinaQMTECH / ZYJZGW_Kintex-7_XC7K325T_Starter_Kit
  ☆16Updated 2 years ago
• Dmitriy0111 / nanoFOX
  A small RISC-V core (SystemVerilog)
  ☆31Updated 5 years ago
• johan92 / verilog-coding-style
  Verilog (SystemVerilog) coding style
  ☆40Updated 5 years ago
• aprgl / fx3
  USB interface for FPGA using a the Cypress FX3
  ☆13Updated 4 years ago
• chili-chips-ba / openXC7-TetriSaraj
  Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…
  ☆19Updated last month
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆50Updated last year
• quartiq / bscan_spi_bitstreams
  FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.
  ☆52Updated last year
• bvernoux / mingw-bundledlls
  C native app that takes an EXE file, automatically figures out all the DLL dependencies, and copies them next to the EXE.
  ☆12Updated last year
• Chair-for-Security-Engineering / AES_masked_BRAM
  Designs of first-order SCA-secure hardware implementations of AES encryption/decryptoin dedicated to Xilinx FPGAs (using BRAM)
  ☆14Updated 3 years ago
• syntacore / fpga-sdk-prj
  FPGA-based SDK projects for SCRx cores
  ☆17Updated 2 years ago
• stnolting / neorv32-verilog
  ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
  ☆66Updated this week
• chili-chips-ba / wireguard-fpga
  Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek sec…
  ☆33Updated this week
• hdl-util / i2c
  Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
  ☆23Updated 4 years ago