Alternatives and similar repositories for chipyard

Users that are interested in chipyard are comparing it to the libraries listed below

• acsl-technion / nica
  An infrastructure for inline acceleration of network applications
  ☆29Updated 3 years ago
• vishal1303 / PIEO-Scheduler
  A Fast, Scalable and Programmable Packet Scheduler in Hardware
  ☆38Updated 6 years ago
• minmit / tonic
  A Programmable Hardware Architecture for Network Transport Logic
  ☆35Updated 3 years ago
• multitenancy-project / menshen
  ☆51Updated 3 years ago
• axbryd / FlowBlaze
  FlowBlaze: Stateful Packet Processing in Hardware
  ☆71Updated 2 years ago
• utnslab / RingleaderNIC
  ☆15Updated 2 years ago
• tcp-acceleration-service / FlexTOE
  Flexible, high-performance TCP offload to SmartNICs using fine-grained parallelism
  ☆58Updated 3 years ago
• programmable-scheduling / pifo-hardware
  ☆35Updated 9 years ago
• pcie-bench / pcie-model
  ☆69Updated 8 months ago
• axbryd / hXDP-Artifacts
  ☆60Updated 4 years ago
• NetSys / irn-vivado-hls
  IRN's packet processing logic synthesized using Xilinx Vivado HLS
  ☆23Updated 6 years ago
• spcl / pspin
  PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing
  ☆104Updated 2 years ago
• WukLab / Clio
  Clio, ASPLOS'22.
  ☆78Updated 3 years ago
• anirudhSK / drmt
  ☆15Updated 8 years ago
• RC4ML / FpgaNIC
  FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]
  ☆132Updated 2 years ago
• NetFPGA / NetFPGA-PLUS
  ☆53Updated last year
• axbryd / warp-artifacts
  Artifacts for ATC '22 paper "Faster Software Packet Processing on FPGA NICs with eBPF Program Warping"
  ☆18Updated 3 years ago
• engjefersonsantiago / P4HLS
  P4 compatible HLS modules
  ☆11Updated 7 years ago
• packet-transactions / banzai
  A machine model for line-rate programmable switches
  ☆25Updated 9 years ago
• Winters123 / FastRMT
  Orignal code/dev history for Menshen paper (NSDI 2022), see https://github.com/multitenancy-project/menshen for official version.
  ☆29Updated 3 years ago
• p4fpga / p4fpga
  P4-14/16 Bluespec Compiler
  ☆87Updated 7 years ago
• HKUST-SING / srnic-simulation-public
  ☆20Updated 2 years ago
• jhypolite / DeepMatch
  DeepMatch: Practical Deep Packet Inspection in the Data Plane using Network Processors
  ☆15Updated 4 years ago
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆46Updated 2 years ago
• Xilinx / RecoNIC
  RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.
  ☆148Updated 7 months ago
• mangpo / floem
  Programming system for NIC-accelerated network applications
  ☆28Updated 7 years ago
• NetFPGA / P4-NetFPGA-public
  P4-NetFPGA wiki
  ☆104Updated 7 years ago
• NetSys / disaggregation
  ☆20Updated 8 years ago
• Terabit-Ethernet / NetChannel
  ☆43Updated last year
• in-ATP / switchML
  ☆32Updated 4 years ago