☆18Jul 20, 2022Updated 3 years ago
Alternatives and similar repositories for HyperProtoBench
Users that are interested in HyperProtoBench are comparing it to the libraries listed below
Sorting:
- ☆18Mar 17, 2023Updated 3 years ago
- A simple program to convert gdsII files to vector output formats. Currently used to create laser-cut models of standard cells.☆12May 30, 2023Updated 2 years ago
- ☆14Aug 31, 2025Updated 6 months ago
- This repo contains instructions, benchmarks, and files for running user space networking in gem5 simulator.☆12Aug 1, 2024Updated last year
- HW/SW co-designed end-host RPC stack☆20Oct 28, 2021Updated 4 years ago
- AI assisted Shell, aka "Ash". Wraps around your existing shell and brings AI-LLM to the CLI for analyzing EDA files.☆28Updated this week
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆24Feb 1, 2020Updated 6 years ago
- ☆21Jun 7, 2024Updated last year
- https://www.usenix.org/conference/atc20/presentation/boucher☆26Mar 25, 2022Updated 3 years ago
- Tutorials on HLS Design☆51Jan 16, 2020Updated 6 years ago
- ☆11Mar 16, 2022Updated 4 years ago
- OCEAN – Open-source CXL Emulation at Hyperscale Architecture and Networking.☆23Mar 14, 2026Updated last week
- MiTMoJCo (Microscopic Tunneling Model for Josephson Contacts) is C and Python code for simulating dynamics of superconducting Josephson j…☆10Feb 9, 2023Updated 3 years ago
- Ballistic Mobility PMIs inside of Sentaurus S-Device☆10May 20, 2020Updated 5 years ago
- RISC-V Specification in Coq☆13Sep 17, 2018Updated 7 years ago
- ☆14Mar 13, 2026Updated last week
- ☆12Nov 14, 2023Updated 2 years ago
- ☆29Aug 4, 2025Updated 7 months ago
- A comprehensive repository for Compute Express Link (CXL) resources: covering research papers, specifications, simulation/emulation tools…☆23Feb 24, 2026Updated 3 weeks ago
- Launch Xilinx Vivado Design Suite using a DCV Remote Desktop on AWS☆16May 12, 2021Updated 4 years ago
- ☆30Mar 20, 2022Updated 4 years ago
- ☆28Jun 17, 2025Updated 9 months ago
- Benchmarking suite for Google workloads☆142Mar 10, 2026Updated last week
- A web-based, unified, interactive bike map for NYC that combines information from NYC OpenData, Citi Bike and other sources.☆22Dec 30, 2022Updated 3 years ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆11Dec 18, 2023Updated 2 years ago
- ☆10Aug 18, 2025Updated 7 months ago
- RKQC is a compiler for reversible logic circuitry. The framework has been developed to compile high level circuit descriptions down to "Q…☆17Jul 22, 2016Updated 9 years ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆18Dec 18, 2023Updated 2 years ago
- Vivado board files for the Kintex 7 HPC V2 FPGA board.☆25Jul 31, 2020Updated 5 years ago
- ☆22Oct 31, 2025Updated 4 months ago
- (Not actively updating)Vision Transformer Accelerator implemented in Vivado HLS for Xilinx FPGAs.☆19Dec 29, 2024Updated last year
- TinyRP is a simple lightweight HTTP reverse proxy made in golang☆12Dec 4, 2022Updated 3 years ago
- A Lightweight Graph Processing Framework for Multi-GPUs☆14Apr 15, 2015Updated 10 years ago
- Using the QOI image format to save sequences of images☆10Feb 12, 2022Updated 4 years ago
- DHCP server that talks GRPC☆15Jul 8, 2017Updated 8 years ago
- GPU model checker☆13Apr 17, 2019Updated 6 years ago
- RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT☆185May 8, 2025Updated 10 months ago
- Simulation of movement of a human character using forward and inverse kinematics☆14May 22, 2016Updated 9 years ago
- The PyNN 0.8 interface to sPyNNaker.☆19Mar 15, 2022Updated 4 years ago