Alternatives and similar repositories for cache-model:

Users that are interested in cache-model are comparing it to the libraries listed below

• gururaj-s / cleanupspec
  CleanupSpec (MICRO-2019)
  ☆17Updated 4 years ago
• comparch-security / cpu-sec-bench
  Security Test Benchmark for Computer Architectures
  ☆20Updated last month
• CSL-KU / SpectreGuard
  Data-centric defense mechanism against Spectre attacks. (DAC'19)
  ☆11Updated 5 years ago
• cwfletcher / stt
  ☆35Updated 4 years ago
• efeslab / dolma
  ☆12Updated 4 years ago
• mjyan0720 / InvisiSpec-1.0
  Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.
  ☆59Updated 4 years ago
• compsec-snu / specdoctor
  ☆23Updated 2 years ago
• gururaj-s / streamline
  Streamline Covert Channel Attack (presented in ASPLOS'21)
  ☆19Updated 4 years ago
• eepalms / gem5-newcache
  New Cache implementation using Gem5
  ☆13Updated 10 years ago
• aakahlow / gem5Valid_Haswell
  ☆18Updated 5 years ago
• gururaj-s / mirage
  MIRAGE (USENIX Security 2021)
  ☆12Updated last year
• cwfletcher / oisa
  Data oblivious ISA prototyped on the RISC-V BOOM processor.
  ☆21Updated 2 years ago
• CTSRD-CHERI / Test-Suite-Transient-Execution
  Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly
  ☆14Updated 3 years ago
• cgvwzq / cachequery
  HW interface for memory caches
  ☆26Updated 4 years ago
• vusec / tlbdr
  ☆18Updated 2 years ago
• melver / mc2lib
  Memory consistency model checking and test generation library.
  ☆15Updated 8 years ago
• draperlaboratory / hope-RIPE
  A port of the RIPE suite to RISC-V.
  ☆29Updated 6 years ago
• Yujie-Cui / WB-channels
  ☆11Updated 2 years ago
• ekiwi / rtl-fuzz-lab
  A Modular Open-Source Hardware Fuzzing Framework
  ☆32Updated 3 years ago
• mktrm / SecSMT_Artifact
  The artifact for SecSMT paper -- Usenix Security 2022
  ☆27Updated 2 years ago
• shinezyy / gem5-official-old
  ☆16Updated 3 years ago
• zzrcxb / PinnedLoads
  Gem5 implementation of Pinned Loads: Taming Speculative Loads in Secure Processors
  ☆9Updated 2 years ago
• umd-memsys / gem5
  This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…
  ☆11Updated 4 years ago
• rzhang2285 / Coppelia
  Code repository for Coppelia tool
  ☆22Updated 4 years ago
• fanyao / branchspec
  Proof of concept code for the BranchSpec exploit.
  ☆9Updated 2 years ago
• darchr / gem5art
  Artifact, reproducibility, and testing utilites for gem5
  ☆21Updated 3 years ago
• miaochenlu / arch_sec_papers
  ☆14Updated this week
• dian-lun-lin / GenFuzz
  GPU-enabled Hardware Fuzzer using Genetic Algorithm
  ☆17Updated last year
• ymanerka / rtlcheck
  RTLCheck
  ☆20Updated 6 years ago
• riscv-boom / boom-attacks
  Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)
  ☆61Updated 5 years ago