Alternatives and similar repositories for ldpc-fpga

Users that are interested in ldpc-fpga are comparing it to the libraries listed below

• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆77Updated 2 years ago
• Mshivam2409 / LDPC-Decoder
  Implementation of Partially Parellel LDPC Code Decoder in Verilog
  ☆15Updated 5 years ago
• blegal / Fast_LDPC_decoder_for_x86
  The source codes of the fast x86 LDPC decoder published
  ☆28Updated 5 years ago
• Spartak0s / Polar-Codes-Hardware-VHDL
  Polar Codes Implementation on Vhdl
  ☆13Updated 9 years ago
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆124Updated last week
• Lcrypto / Algebraic_QC-LDPC
  Algebraic methods for construction QC-LDPC and cyclic LDPC LDGM EG-LDPC source codes
  ☆17Updated 11 months ago
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆40Updated 7 years ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆28Updated 11 years ago
• liuguangxi / wifi_ldpc_codec
  Wi-Fi LDPC codec Verilog IP core
  ☆18Updated 6 years ago
• codyps / wimax_ofdm
  Partial Verilog implimentation of a WiMAX OFDM Phy
  ☆19Updated 13 years ago
• cea-wind / hls_ldpc_dec
  Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..
  ☆41Updated 6 years ago
• crboth / LDPC_Decoder
  Low Density Parity Check Decoder
  ☆18Updated 9 years ago
• j1s1e1 / VerilogTurboCodeMaxProduct
  Turbo coder and decoder
  ☆12Updated 2 years ago
• blegal / Fast_LDPC_decoder_for_ARM15
  LDPC decoders for ARM processor
  ☆11Updated 4 years ago
• phthinh / OFDM_802_16
  IEEE 802.16 OFDM-based transceiver system
  ☆28Updated 6 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆55Updated 2 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆58Updated last year
• arun1993 / FPGA-Wireless-communication-blocks
  Implementation of Wireless communication blocks such as FFT, OFDM receiver, Polar code decoder in a FPGA using Vivado HLS
  ☆28Updated 4 years ago
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆21Updated 5 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆44Updated 9 years ago
• yuqren / polarbplist
  BP list decoding for polar codes
  ☆14Updated 2 years ago
• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆52Updated 8 years ago
• Haybla / LDPC-CC_Pipeline_Decoder
  This is a CUDA application for LDPC-CC Decoder
  ☆15Updated 10 years ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆48Updated last year
• strath-sdr / pynq_agc
  Demonstration of Automatic Gain Control with PYNQ
  ☆16Updated 3 years ago
• liuguangxi / gng
  Gaussian noise generator Verilog IP core
  ☆32Updated 2 years ago
• robmaunder / ldpc-3gpp-matlab
  Matlab simulations of the encoder and decoder for the New Radio LDPC code from 3GPP Release 15
  ☆49Updated 4 years ago
• robmaunder / exit-matlab
  Tools for plotting Extrinsic Information Transfer (EXIT) charts in Matlab
  ☆16Updated 3 years ago
• strath-sdr / rfsoc_notebooks
  A collection of RFSoC introductory notebooks for PYNQ.
  ☆24Updated 4 years ago
• Lcrypto / Construct-Long-Length-Block-and-Convolutional-MET-QC-LDPC-
  construction high perfomance long length, low error floor block Multi-edge Type (MET) QC-LDPC codes and Tail-Biting convolutional MET QC-…
  ☆34Updated last year